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Nanoelectronics
Published in Shilpi Birla, Neha Singh, Neeraj Kumar Shukla, Nanotechnology, 2022
In 1958, finally a breakthrough in the FET technology was obtained when Mohammed Atalla performed passivation of surface states by growing a thin SiO2 layer over clean Si surfaces, called surface passivation. This technology became crucial to the semiconductor commercial technology, which eventually led to the mass-scale production of ICs on the semiconductor platform. In 1959, Mohamed Atalla, along with Dawon Kahng, developed the first-ever MOSFET that laid the foundation of modern CMOS technology [9]. MOSFET technology had superior characteristics of lower power consumption, higher density and high level of scalability that led to the fabrication of high-density ICs. In 1963, CMOS technology for fabrication of MOSFETs was produced by Chih-Tang Sah, along with Frank Wanlass, at Fairchid Semiconductor [21]. In 1967, Dawon Kahng, along with Simon Size, developed a floating-gate MOSFET. Toshihiro Sekigawa and Yutaka Hayashi presented the first double-gate MOSFET in 1984 [22]. In 1989, a 3D nonplanar multi-gated variant of MOSFET, known as fin field-effect transistor (FinFET), was developed by Digh Hisamoto at the Hitachi Central Research Laboratory [23].
The modified alpha power law based model of statistical fluctuation in nanometer FGMOSFET
Published in Cogent Engineering, 2018
A special electronic device namely Floating-Gate MOSFET (FGMOSFET) has been widely used in analog and digital circuits. The performances of these circuits can be deteriorated by the process induced device level statistical fluctuations. This is because such device level fluctuations causes the statistical fluctuations in circuit level parameters. Thus the analytical model of process induced statistical fluctuation in drain current which is the key circuit level parameter, of FGMOSFET has been found to be necessary and some previous models have been proposed. Unfortunately, they have certain flaws caused by their assumed approximations and modeling approach. Therefore the aforesaid model of the nanometer FGMOSFET has been developed in this work according to the reign of the nanometer technology where those flaws have been removed. The proposed model is very accurate and has been found to be beneficial to the analysis and designing of the FGMOSFET based circuit in the nanometer regime.