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Role of High-Performance VLSI in the Advancement of Healthcare Systems
Published in Balwinder Raj, Brij B. Gupta, Jeetendra Singh, Advanced Circuits and Systems for Healthcare and Security Applications, 2023
Jeetendra Singh, Balwant Raj, Monirujjaman Khan
The semiconductor industry growth has been very fast in the past few years and the semiconductor devices are evolving in such a way that we can implement these devices in so many applications and in so many fields like medical, business, construction, manufacturing industries, etc. Electronic system design manufacturing (ESDM) industry is one of the fastest-growing industries in India. Very-large-scale integration (VLSI) is the process that implements the number of ICs in one single chip using hundreds and thousands of transistors and resistors. The VLSI industry has evolved so much in the past few years. And the most of the devices are now used in the medical field also for monitoring the health of the patient and to control the devices that are used for treatment purposes. Also, VLSI devices have been found in automobiles, cell phones, cameras, and a variety of other applications. Advances in process geometry, feature, and product developments have increased the demand for IC design, development, and re-engineering. Core-based design must be investigated to satisfy the growing demand since it has the potential to increase performance.
VLSI Scaling and Fabrication
Published in Manoj Kumar Majumder, Vijay Rao Kumbhare, Aditya Japa, Brajesh Kumar Kaushik, Introduction to Microelectronics to Nanoelectronics, 2020
Manoj Kumar Majumder, Vijay Rao Kumbhare, Aditya Japa, Brajesh Kumar Kaushik
The VLSI chips are broadly categorized into analog- and digital-based circuit implementation. The functionality of a digital IC depends on the binary level of inputs, that is, 0's and 1's. The analog ICs basically work by processing the continuous signal and are used for amplification, filtering, modulation, etc. The design process of a digital IC is mostly automated and transistor on a chip consumes less power and supply in comparison to the analog IC. The hardware description language (HDL) is used to describe the digital circuits, while analog cannot be described using HDL, and the analog modules need to be separated from the entire design process due to separate requirements of the ground terminals. In the case of analog VLSI, the impact of noise is more severe due to direct injection into the real system while testing the circuits. In a digital VLSI circuit, it is easy to identify the faults and has a lower impact on noise.
System Architecture of a Multiprocessor System
Published in David R. Martinez, Robert A. Bond, Vai M. Michael, High Performance Embedded Computing Handbook, 2018
In addition to mapping algorithm requirements to different classes of hardware, the system architect must also ensure that the overall system meets the available size, weight, and power constraints. The overall system will draw significantly more power and will occupy a larger volume once all support hardware is taken into account, resulting in a much lower throughput per unit volume and per unit power than predicted by the performance of the microprocessors alone. Over several decades, the microprocessors, both custom VLSI and programmable chips, have had dramatic exponential growth in performance, commensurate with Moore’s Law. However, the trend is slowing down, and predicted to slow down more, because of the significant increase in power consumption by these microprocessors. Therefore, HPEC architects and designers must pay careful attention to the overall system capabilities with all critical building components included in the expected system performance and final characteristics.
Based on FS-GDI Approach with 65 nm Technology: Low Power ALU Design
Published in International Journal of Electronics, 2023
Mohsen A. M. El-Bendary, F. Amer
The power consumption is related directly to the computational complexity of the system. In Mohsen & Atef (2019), the authors analysed the computational complexity due to the data protection schemes and amount of transmitted data. The arithmetic and logic unit is the main component in the data processing such as the data encoding and decoding in the communications systems. This paper presents various ALU designs for improving the power efficiency of mobile devices and data processing circuits. The increasing demand for low-power VLSI achieved at different design levels, such as the architectural, circuit and the process technology level. At the circuit design level, considerable power savings exists by means of proper choice of a logic style for implementing combinational circuits (Dubey & Sairam, 2014).
Design and Simulation of Reliable Low Power CMOS Logic Gates
Published in IETE Journal of Research, 2023
The basic needs for the VLSI systems are small size, low power dissipation and high speed. Semiconductor era is regularly focusing on device size scaling to incorporate more elements on a chip. Minimization of devices in nanoscaled regime effectively reduces the chip area and enhancing the speed of the devices. Miniaturization of the semiconductor devices is the process to get smaller device measurements, thus adding more devices on a chip. Each new technology node not only enlarges the device density but also enhances the switching speed of the logic circuits [1]. Technology node scaling affects the voltage levels of the devices such as power supply and threshold voltage. Scaling of the voltage levels increases performance of logic circuits. Threshold voltage scaling causes large leakage current of the concerned device [2].
A Novel Slice-Based High-Performance ALU Design Using Prospective Single Electron Transistor
Published in IETE Journal of Research, 2022
Rashmit Patel, Yash Agrawal, Rutu Parekh
The VLSI design demands high chip density, high speed, and low power. These can be effectively attained by scaling. However, continuous scaling of devices causes various non-ideal issues such as short channel effect, higher power dissipation, considerable leakage current, process variability, and design reliability [1,2]. These can be projectively mitigated by incorporating advance devices like single electron transistor (SET) [3]. The SET can be fabricated with back end of line (BEOL) process that aids in efficient on-chip integration. The compatibility of SET-CMOS integrated logic operation at 22 nm is shown in [4]. The SET consists of two tunnel junctions that are separated from the source and drain electrodes by a conductive island. The connection to the island makes the two gates that enable switching ON/OFF the SET device [5]. The SET device structure is shown in Figure 1 that comprises source (s), drain (d), control gate (g1), and tuning gate (g2). There have been several researches performed on SET [6,7]. Various logic cell designs using dual gate SET at room temperature are shown in [5]. Using the same technology, a SET-based computing system can be designed.