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Pertinent Properties of Euclidean Space
Published in Gerhard X. Ritter, Gonzalo Urcid, Introduction to Lattice Algebra, 2021
Gerhard X. Ritter, Gonzalo Urcid
An example of an accelerator is the Field Programmable Gate Array (FPGA). The FPGA is an integrated circuit of a collection of logic blocks, where each logic block has the ability to do a simple logic operation such as AND, OR, and XOR. The real power of FPGAs is that the logic blocks can be easily reconfigured dynamically to perform massively parallel tasks in real time. Increased performance in real time pattern recognition has become an extraordinary achievement of the development of artificial neural networks.
Digital theory, logic, and two-state control
Published in Raymond F. Gardner, Introduction to Plant Automation and Controls, 2020
Transistors are active devices that are capable of producing both logic functions and output-signal amplification, eliminating the signal degradation associated with logic circuits that use passive diodes. TTL circuits tend to be faster and easier to construct, and they are consequently preferred for integrated circuits (IC chips) used in computers, instrumentation, and controls.
Review of Digital Electronics Design
Published in Suman Lata Tripathi, Sobhit Saxena, Sushanta Kumar Mohapatra, Advanced VLSI Design and Testability Issues, 2020
Reena Chandel, Dushyant Kumar Singh, P. Raja
Integrated circuits (ICs) are majorly classified into two types: one is analog and another one is digital IC. The digital ICs are separated on the basis of complication of the circuit or the number of transistors to construct the digital logic-circuit (IC).
On the Effect of Operational Amplifier Gain-bandwidth Product on the Performance of Basic Building Blocks
Published in IETE Journal of Education, 2022
The operational amplifier is a very useful integrated circuit for realizing several functions such as summation, amplification, differentiation, integration, rectification, etc. Most of the engineering curricula have a basic course on Linear integrated circuits [1–7]. Several teachers have been teaching about these for the past few decades. However, there is still is a need to pack more information to enhance the understanding of the opamp finite gain-bandwidth product (GBW) to the students. In this paper, we review certain ideas well recognized by Active Filter researchers over the years but put into practice more recently in contemporary Analog IC designs. We describe the basic circuits using the finite frequency-dependent gain model of the opamp without considering the virtual ground concept and then describe methods of reducing the deviation in performance. We also describe circuits that exploit the opamp finite GBW in realizing simpler circuits instead of considering it as an undesirable problem. All these ideas can be explained by teaching the students differently from the beginning, which is the subject matter of this paper.
Multilevel spatial randomness approach for monitoring changes in 3D topographic surfaces
Published in International Journal of Production Research, 2020
Mejdal A. Alqahtani, Myong K. Jeong, Elsayed A. Elsayed
In semiconductor manufacturing, hundreds of integrated circuits (ICs) or chips are assembled on a single wafer made of different materials such as copper and silicon (Zhang, Wang, and Chen 2016). These ICs have different functions based on the type of electronic devices to be used. However, surface faults, such as pits, ridges, and scratches, commonly appear on the surface topography of wafers during semiconductor manufacturing. These faults can form nucleation sites for corrosion and cracks that can cause low functional integrity of ICs, yielding the low performance of electronic devices (Rao et al. 2015a, 2015b). Hence, monitoring the surface topography of wafers is needed for enhancing the quality of its manufacturing process. Figure 7 shows the top view of an anomaly copper wafer with ‘rough’ surface topography associated with pits, ridges and scratches, and an in-control copper wafer with ‘smooth’ surface topography.
Dynamic analysis and design of a semiconductor supply chain: a control engineering approach
Published in International Journal of Production Research, 2018
Junyi Lin, Virginia L.M. Spiegler, M.M. Naim
Specifically, there are two main manufacturing stages for microprocessor chip production from a material flow perspective: fabrication and assembly. The polished disc-shaped silicon substrates (wafers) as inputs are taken into a wafer fabrication facility, and through several complicated sequences to produce fabricated wafers (composed of integrated circuits, i.e. ICs or dies). A vertical cross-section of an integrated circuit reveals several layers formed during the fabrication process. Lower layers include the critical electrical components (e.g. transistors, capacitors), which are produced at the ‘front-end’ of the fabrication process. Upper layers, produced at the ‘back-end’ of the fabrication process, connect the electrical components to form circuits. In the second assembly phase, the fabricated wafers are cut into dies and stored in the ADI warehouse to wait for the assembly process. After passing assembly and test plants to ensure operability, the finished microprocessors are stored in the FGI for customer orders. A three-stage supply chain, including fabrication, assembly and distribution, is thereby created to represent the manufacturing process.