Explore chapters and articles related to this topic
Safety and Electrostatic Hazards
Published in Mazen Abdel-Salam, Hussein Anis, Ahdab El-Morshedy, Roshdy Radwan, High-Voltage Engineering, 2018
Hospitals, especially operation theaters, suffer from static electricity hazards. Personnel scuffing along corridors with high resistance floors accumulate large static charges which may cause ESD. In operation theaters the presence of anesthetics and probable leakage during daily work may cause serious accidents to the patient, doctors, and nursing staff. These accidents may be fires, burns, or explosions. Also, during dry winter days, changing synthetic bed sheets and similar clothes may lead to ESD. To eliminate ESD hazards, flooring should be of an antistatic material with relatively low resistivity. Accumulation of static charges on moving personnel can be appreciably decreased by wearing heel grounders to offer a continuous path between them and the antistatic flooring. If the decay time of charge on personnel is a few tens of milliseconds, there will be no chance of charge accumulation since the time to take one step is longer than that. Also, great care should be taken to reduce anesthetic vapor in the ambient and to use a good ventilation system. Bed sheets and clothes of surgeons and nursing staff should be of conducting material.
Components, Emission Reduction Techniques, and Noise Immunity
Published in David A. Weston, Electromagnetic Compatibility, 2017
It is a myth to assume that once an integrated circuit is mounted on a PCB, it is immune to an electrostatic discharge even when the IC input connections are not brought out to a connector. There is no better approach to protection than to avoid an ESD event by correct procedures, such as the use of a ground strap, antistatic bags, grounded mats, and deionizers. Integrated circuits mounted on PCB s where the input pins are brought out to an edge connector are just as sensitive to ESD as non-board-mounted ICs. Additional protection for CMOS logic and FET input op amps is relatively easy to achieve by inclusion of series resistance between the input and the device and either resistance or diodes/zener diodes between the input and ground.
Compact Modeling of Semiconductor Devices for Electrostatic Discharge Protection Applications
Published in Juin J. Liou, Krzysztof Iniewski, Electrostatic Discharge Protection, 2017
With the continuous scaling of semiconductor technology, electrostatic discharge (ESD) protection becomes more challenging. The commonly used devices for ESD protection are resistor, diode (STI diode and gated diode), bipolar junction transistor (BJT), gate-grounded MOS (GGMOS), and silicon-controlled rectifier (SCR), with some modifications of the standard device layout and design rule, to address the ESD requirements. Figure 10.1 gives a schematic of basic on-chip ESD protection concept. The ESD clamp can be diode, BJT, GGMOS, or SCR. Resistor (RESD) is basically located between the primary and secondary ESD protection to shunt large current.
The ESD Control Program Handbook
Published in Technometrics, 2022
In electronics manufacturing, electrostatic discharge (ESD), which can damage or destroy modern electronic components, has become a concern. The preface of The ESD Control Program Handbook states “few books have been available to discuss, evaluate, maintain, and update an effective ESD control program.” Due to this concern, 13 chapters in this book aim to cover all the aspect of modern process for electrostatic control in the manufacturing or other materials related to electronics.
Calibration of Electrostatic Discharge (ESD) Generator in Accordance with IEC61000-4-2: 2008 at SCL
Published in NCSLI Measure, 2018
H. W. Lai, Michael W. K. Chow, K. Y. Chan
All electrical and electronic equipment are subject to electrostatic discharge under an electromagnetic environment. Electrostatic charge, which builds up on a human being, can be coupled to these devices by direct human contact or indirect contact via metallic objects. Electrostatic discharge (ESD) is a tiny version of lightning which can damage electronic circuitries. An ESD generator, also known as an ESD gun or ESD simulator, is often used to test the immunity of devices to ESD under certain DC high voltage pulses, typically 8 kV. To improve the reproducibility of the measured results and to have valid traceability, periodic calibration of ESD generators are necessary. The requirements for calibrating an electrostatic discharge (ESD) generator are given in Annex B.4 of the International Standard IEC 61000-4-2 Edition 2.0 (2008–12) of electromagnetic compatibility [1] and in the literature [2]. The properties to be tested for the waveform of current discharge pulses and DC high voltage pulses under contact discharge mode are specified in the International Standard. By following the recommendations in IEC 61000-4-2, the Standards and Calibration Laboratory (SCL) has developed a series of technical procedures to test the required parameters. The measured data includes the first peak current, the rise time, and the current at 30 ns and 60 ns of the output current discharge waveform for contact discharge test. The waveform is obtained by an ESD target-attenuator-cable, which is a current to voltage transducer. Tests are usually conducted at both positive and negative output pulse voltages at 2 kV, 4 kV, 6 kV, and 8 kV. The open circuit DC voltage of the ESD generator before discharge for both contact and air discharge modes are also measured using electrostatic voltmeter. For the air discharge mode, the measured voltage is up to ±15 kV. The calibration is traceable to various reference standards maintained at SCL, including DC voltage, DC resistance, RF power, attenuation, and frequency standards. In this article, an ESD generator in the SCL (the unit under test, or UUT) is calibrated using the procedures described in this paper as a demonstration. The measurement results together with the corresponding uncertainties are presented. Section 2 provides general information for the calibration. The current discharge pulse test and the DC high voltage test are described in Sections 3 and 4, respectively. The preparation of instrument, the measurement setup, the measurement procedure, and the uncertainty evaluation are discussed in detail in both sections. Finally, a conclusion is provided.