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Radio Frequency Power Transistors
Published in Abdullah Eroglu, Introduction to RF Power Amplifier Design and Simulation, 2018
Safe operating area (SOA) is the region identified by the maximum value of the drain-to-source voltage and drain current that guarantees safe operation when the device is at the forward bias. The SOA for MOSFETs can be expressed by a constant-power line, which is limited by thermal resistance with pulse width as a parameter. MOSFETs can be safely operated over a very wide range within the breakdown voltage between the drain and the source without narrowing the high-voltage area because secondary breakdown does not occur in the high-voltage area. The typical SOA for a MOSFET is illustrated in Figure 2.25. The relationship between SOA and device parameters such as Rdson and Pdmax is given in Figure 2.26. In Figure 2.26, the actual response of device dissipation characteristics, which has steeper slope when it is over a certain value, is assumed.
Amplifier and Loudspeaker Protection
Published in Douglas Self, Audio Power Amplifier Design, 2013
Solid-state output devices have several main failure modes, including excess current, excess power dissipation, and excess voltage. These are specified in manufacturer’s data sheets as Absolute Maximum Ratings, usually defined by some form of words such as ‘exceeding these ratings even momentarily may cause degradation of performance and/or reduction in operating lifetime’. For semiconductor power devices, ratings are usually plotted as a Safe Operating Area (SOA) which encloses all the permissible combinations of voltage and current. Sometimes there are extra little areas, notably those associated with second-breakdown in BJTs, with time limits (usually in microseconds) on how long you can linger there before something awful happens.
Characterization, Part II
Published in Edwin S. Oxner, Fet Technology and Application, 2020
A major consideration involves the effect of rDS(on) on the safe operating area (SOA)—more correctly, the active operating area—especially at lower drain voltages. We must not lose sight of Ohm's law, when studying the SOA of a power DMOSFET (Figure 5.14); rDS(on) limits performance at low drain-source voltages.
Mitigation of Cross-Coupling Effects in PV String-Integrated-Converters Employing SEPIC Converter with P&O MPPT Technique
Published in IETE Journal of Research, 2022
Suneel Raju Pendem, Suresh Mikkili, Dharani Kolantla
The parameters governing the selection of MOSFET are max drain-to-source voltage , drain-to-source resistance , drain-to-source current , threshold gate voltage , and gate charge. The voltage, should be always twice of the voltage at . The resistance, indicates the amount of heat generated by the MOSFET during ON state. The maximum value of current should be with in the safe operating area, otherwise because of heating the MOSFET will be damaged. The voltage, indicates the operating voltage of the MOSFET to start conduction. Gate charge is the magnitude of voltage that must be applied to gate terminal to fully turn-on the MOSFET switch.
Implementation of Trench-based Power LDMOS and Low Voltage MOSFET on InGaAs
Published in IETE Technical Review, 2019
Manoj Singh Adhikari, Yashvir Singh
Although silicon is widely used for fabrication of electronic devices with high quality thermodynamically stable native oxide (SiO2), the performance of Si based devices is approaching their limits due to inherent material properties such as slow mobility. Therefore, there is a necessity of alternate semiconductor materials for improving the performance of electronic devices particularly at high frequencies. Recently, research attention has been motivated on III–V-based semiconductor materials because of their higher transport properties [21–23]. These compound semiconductors have a wide range of band-gaps and carrier mobilities, so they are suitable for different applications. In past two decades, InGaAs has emerged as an alternative material to replace silicon for the future high-speed digital devices [24]. The major problem in InGaAs material was the unavailability of native oxide like SiO2 for silicon. In the past, great efforts have been made to improve the fabrication process with high-quality insulators for InGaAs MOSFETs. Until now, researchers have been primarily examining various aspects of InGaAs-channel MOSFETs for high-speed low-voltage logic applications [25–29]. These investigations demonstrate that the higher carrier mobilities and low effective masses can be translated to higher drive current, lower access resistance, and higher transconductance. It was also interesting to explore the use of InGaAs material for power LDMOS to enhance the device performance. In the literature, there are some reports which demonstrate the suitability of high mobility InGaAs semiconductor for LDMOS to enhance the performance in terms of higher breakdown voltage, higher drive current, lower on-resistance, increase transconductance, better frequency response, and increase safe operating area [16,17,30–33]. The motivation of this work is to propose the integration of power LDMOS and low voltage MOSFET on InGaAs substrate.