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MOS Field-Effect Transistor (MOSFET) Circuits
Published in Michael Olorunfunmi Kolawole, Electronics, 2020
This chapter has discussed the basic principles, structures, and applications of MOSFET; a type of transistor used for amplifying and/or switching electronic signals mostly in digital circuits. In a simplified view, NMOS transistors can be treated as simple switches, where the gate voltage controls whether the path from drain to source is an open circuit (i.e. OFF) or a resistive path (i.e. ON). A PMOS transistor acts as an inverse switch; that is, it is ON when the controlling signal is low and OFF when the controlling signal is high. A summary of small-signal (incremental) models of two major types of MOSFET devices used in analog, digital, and mixed-mode integrated circuits is also considered. A very important application of MOSFETs (MOSs) is in the arrangement known as a CMOS system, which we consider in the next chapter (Chapter 6).
Phase Change Memory
Published in Hai Li, Yiran Chen, Nonvolatile Memory Design, 2017
It is straightforward to connect the PCM device to an MOS transistor in series in a PCM cell, as shown in Figure 2.19 [27]. The existence of an NMOS transistor serves two purposes: first, it supplies the current to the PCM device; second, it can be used to select the PCM cells by turning it on or off. In the design shown in Figure 2.19, the top of the PCM device (GST) is connected to the BL through a top electrode contact (TEC). A bottom electrode contact (BEC) is formed below the GST and connected to the drain of access transistor terminal through a bottom electrode (BE). This simple cell structure can be easily integrated into the conventional CMOS process. Here the BEC works as a heater to realize the phase transition of GST between set and reset states. Here NMOS transistors are used due to their greater driving ability than P-type metal-oxide semiconductor (PMOS) transistors.
Electromagnetic Compatibility for High-Speed Circuits
Published in Xing-Chang Wei, Modeling and Design of Electromagnetic Compatibility for High-Speed Printed Circuit Boards and Packaging, 2017
Complementary metal–oxide–semiconductor (CMOS) devices have high noise immunity and low static power consumption. These properties make them commonly employed in modern high-speed digital chips. The CMOS inverter is a basic device unit in these chips and includes a positive channel-metal-oxide-semiconductor (PMOS) and an negative channel-metal-oxide-semiconductor (NMOS) connecting both gates and both drains together, as shown in Figure 1.8a. The PMOS transistor presents a low resistance between its source and drain contacts when a low gate voltage is applied and presents a high resistance when a high gate voltage is applied. The NMOS transistor presents a high resistance between its source and drain when a low gate voltage is applied and presents a low resistance when a high gate voltage is applied. The low resistance allows the current to flow through it and can be considered the ON state of the PMOS/NMOS, whereas a high resistance limits the current flowing through it and can be considered as the OFF state of the PMOS/NMOS. Therefore, the CMOS inverter can be taken as a switch, as shown in Figure 1.8b. When input voltage is low (“0” level), the NMOS transistor is OFF and the PMOS transistor is ON, and then, the output is connected to the V dd and the current can flow from the power supply to the output. When input voltage is high (“1” level), the NMOS transistor is ON and the PMOS transistor is OFF, and then, the output is connected to the ground Vss.
Substrate noise evaluation for lightly doped 45nm N-MOSFET using physical simulation models
Published in International Journal of Electronics, 2023
Sanjay Sharma, R. P. Yadav, Vijay Janyani
The frequency content of the noise substrate can be moved instead of reducing the magnitude, and in some cases, it is possible to move the noise substrate to lower or higher frequencies. The possibilities for locating the components of noise substrate outside the analog signal band are determined by moving the noise frequency components. CMOS circuit is typically tied with the well-defined bias voltage. Generally, the body of the NMOS transistor is connected to the ground, and the body of the PMOS transistor is connected to the positive power supply voltage. The body of the NMOS transistor substrate surrounding the transistor channel is a uniformly doped substrate. The contacts biased to the NMOS transistor are connected directly to the substrate. Consider a model where the analog and digital circuit shares the same substrate. Figure 3 shows the capacitor coupling of substrates.
Gated Clock and Revised Keeper (GCRK) Domino Logic Design in 16 nm CMOS Technology
Published in IETE Journal of Research, 2023
Here, a 2-input multiplexer is used for selecting one out of two inputs i.e.clock or out. The multiplexer is designed using transmission gates which combine the complementary properties of NMOS and PMOS transistors [9]. The NMOS transistor passes a weak “1” but a good “0” while PMOS passes a good “1” and weak “0”. Figure 10 shows the multiplexer using transmission gates used in the proposed design. The width of the PMOS transistor is taken as 250 nm while width of NMOS transistor is 100 nm.
Hafnia-based resistive switching devices for non-volatile memory applications and effects of gamma irradiation on device performance
Published in Radiation Effects and Defects in Solids, 2018
N. Arun, K. Vinod Kumar, A. P. Pathak, D. K. Avasthi, S. V. S. Nageswara Rao
In modern-day memory technology, n-channel metal oxide semiconductor (NMOS) transistor or a floating gate cell is used for storing a single bit. In each of these single transistor fabrication in the industry for many decades, SiO2 has been effectively serving as gate dielectric material (1–2). As the oxide thickness is reducing to its scalable limit, the gate leakage current due to quantum mechanical tunnelling has attained more significance. The required thickness of the gate oxide, SiO2 has reached 1 nm (3), which leads to unacceptable large leakage currents in the different forms of tunnelling from the substrate to the gate electrode (4). Hence, there is a need for an alternative material which can suitably replace and be compatible with the well-established Si technology. In search of material best adoptable to this Si technology, we find high-k dielectrics such Al2O3, HfO2, ZrO2, Y2O3, TiO2, and Ta2O3 are the possible choices (5). Among those, HfO2 has been opted to be Si technology compatible by taking into consideration certain critical material properties. HfO2 has a reasonably high band gap (5.8 eV), high dielectric constant (∼25) and better thermodynamic stability on the surface of silicon (6). In Non-NVM, Resistive Random Access Memory (RRAM) technology has attracted a wide range of potential applications. Hence, it is important to study the new alternate dielectric material, HfO2, as an insulating medium for RRAMs. HfO2 is sandwiched between two metal electrodes to form a simple Metal–Insulator–Metal (MIM) structure. The RRAM has some key notable features such as fast switching (ns), high storage capacity, high retention and endurance, which make it a potential candidate to replace the conventional memory devices (7–9). Radiation damage and reliability studies attain significance as these memory devices will eventually be used in deep space and other radiation environment like nuclear laboratories.