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Carbon Nanotubes and Their Device Applications
Published in Khurshed Ahmad Shah, Farooq Ahmad Khanday, Nanoscale Electronic Devices and Their Applications, 2020
Khurshed Ahmad Shah, Farooq Ahmad Khanday
An interconnection (a thin film) provides connectivity between two/more nodes designed on a silicon chip made of conducting material. Earlier, aluminum was the most commonly used material because of its good conductivity and stability with silicon dioxide. Furthermore, it forms excellent ohmic contact with silicon. The current density in interconnections increased with the increase in device density. The problem with aluminum was the electromigration with the increase in current density. Later, it was found that copper having high conductivity is more resistant to electromigration than aluminum. Copper has shown the same reliability in IC applications, with five times more current density as compared to aluminum. Due to the large resistance to electromigration, copper is replaced by aluminum, especially in high-density IC devices for improved performance. With advances in IC technology, the device density increased, which forces the cross section of interconnect to be reduced. The decrease in cross section of copper interconnect has resulted in increase in resistivity due to grain boundary scattering and surface roughness which in turn resulted in power dissipation, propagation delay, and electromigration [72,73]. To overcome this problem for future generation interconnects, many solutions are being taken into consideration [72–85]. CNTs are supposed to be the most promising alternative for copper interconnects.
Paradigm Shift of On-Chip Interconnects from Electrical to Optical
Published in Thomas Noulis, Noise Coupling in System-on-Chip, 2018
Swati Joshi, Amit Kumar, Brajesh Kumar Kaushik
As the technology advances, interconnects are limiting the performance of high-speed systems. This has encouraged researcher to explore alternative interconnect materials and technologies that can replace existing conventional copper interconnect technology with less power consumption, better performance, cost effectivity, and compatibility with existing CMOS fabrication processes. Graphene, a two-dimensional allotrope of Carbon atoms, with its unique optical properties, is emerging as a promising substitute for prevalent optoelectronic, plasmonic, and nanophotonic materials [85]. It is compatible with standard CMOS processes and could be integrated with other grown technologies for high-data-rate (inter and intra-chip) optical blocks. It has tunable optical properties which can be controlled via doping or application of voltage. Due to its large thermal conductivity, high mobility, and large charge-carrier concentrations, it is considered a suitable candidate for electro-optic devices such as modulators or photodetectors [86, 87]. Several kinds of research have shown that graphene-based on-chip optical devices could meet the desired performance requirement for high-speed systems and chips.
Damascene Copper Electroplating
Published in Robert Doering, Yoshio Nishi, Handbook of Semiconductor Manufacturing Technology, 2017
The cost savings associated with the copper dual damascene process sequence may be significant in some applications, however, the transition from aluminum to copper interconnects has been driven primarily by three technical reasons [1–3]. First, the resistivity advantage of copper over aluminum has significantly reduced RC delay times in advanced logic devices, as well as allowed for smaller line dimensions without increased heat generation. Second, as circuit dimensions decrease and line current densities increase the Electromigration (EM) life advantage of copper relative to aluminum becomes critical in ensuring device life. Finally, the extendibility of aluminum etch to circuit dimensions below 0.10 μm has been difficult, while damascene processing of copper is easily extendable below these dimension. Taken together, the advantages of copper interconnects result in interconnect solutions with flexibility to achieve improved EM life, higher device speed, less heat generation, and fewer interconnect metal levels depending on specific requirements. As a result of these advantages, nearly all high performance logic devices have made the transition to copper, as of 2004 [5].
Performance and Power Optimization for Intercalation Doped Multilayer Graphene Nanoribbon Interconnects
Published in IETE Journal of Research, 2022
Bhawana Kumari, Manodipan Sahoo
The IC industry has shifted from transistor-centric to interconnect-centric in recent years because interconnect delay now dominates the transistor delay and is the major factor in determining the total chip delay [1,2]. Copper interconnect has reached its limits because of increase in resistivity, grain boundary scattering effects, degradation in Electro-Migration (EM) reliability leading to reduced current carrying capacity which affects the performance of ICs [3]. Therefore a substitute interconnect material is needed [4]. During the recent past, graphene nanoribbons (GNRs) have rapidly gained importance as an emerging interconnect material [5]. They are exciting prospects for a variety of VLSI circuit applications due to their extraordinary physical properties [6,7]. They have lower resistivity, superior transport properties and higher current carrying capacity than copper in nano-regime [8].