China
Africa
Explore chapters and articles related to this topic
Application Specific Integrated Circuits (ASICs) for Spectral Photon Counting
Published in Katsuyuki Taguchi, Ira Blevis, Krzysztof Iniewski, Spectral, Photon Counting Computed Tomography, 2020
Chris Siu, Conny Hansson, Krzysztof Iniewski
The expected slowdown in Moore's law progress is forcing chipmakers to look for alternate ways to boost ASIC performance. One of the new approaches being proposed relies on connecting large numbers of smaller chips, called chiplets, using silicon interposer technology as schematically shown in Figure 14.2. Instead of carving new ASICs from silicon as single chips, semiconductor companies will assemble them from multiple smaller pieces of silicon. Whether that approach becomes adopted by the semiconductor industry, and whether X-ray photon devices will be assembled that way remains to be seen, but it could possibly serve an alternative approach to existing Moore's law.
Network on chip for enterprise information management and integration in intelligent physical systems
Published in Enterprise Information Systems, 2021
The complexity of the System-on-Chip (SoC) and increasing silicone costs lead to the breakdown of the SoC into smaller ‘chips.’ The Chiplet-Based SoC (CBSoC) (Yin et al. 2018) design process based on chips offers to enable quick SoC design using advanced packaging technologies to integrate multiple, different chips closely (e.g. CPU, GPU, memory, FPGA). However, verification of correctness becomes a major challenge when assembling chiplets into one SoC In general, the network-on-chip (NoC) used to link them together within and across the chiplets can easily be deadlocked, especially if each chip is exposed. The outcome is a comprehensive approach that allows highly modular SoC construction based on chiplets while minimising high-performance deadlocks.