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A universal memory that never runs out of steam
Published in Rajesh Singh, Anita Gehlot, Intelligent Circuits and Systems, 2021
Urvashi Sharma, Sachin Mishra, Gulshan Kumar, Reji Thomas
The article deliberates the possibility of a “Universal Memory” that has the combined features of Flash memory’s non-volatility, SRAM’s fastness, DRAM’s high scalability and DRAM/SRAM’s endurability. Hence, the prospects of emerging memories viz., resistive RAM, magnetic RAM, phase-change RAM and ferroelectric RAM are discussed. Among the ferroelectric RAM, Fe-RAM, Fe-FET and FTJ are discussed in terms of density, retention and speed. FTJ, which is not rigorously considered so far, can be used for realizing the universal memory as it can be manufactured in high density, operated with non-destructive read-out and high speed. FTJ has much potential if a CMOS-compatible ferroelectric material is discovered for the practical application. However, the fabrication, design, conception and modelling of non-volatile memories is still a subject of intense research.
Spin Torque Effects in Magnetic Systems
Published in Evgeny Y. Tsymbal, Žutić Igor, Spintronics Handbook: Spin Transport and Magnetism, Second Edition, 2019
What is the future of STT in spintronic applications? We have seen that a number of new STT-based spintronic devices have been proposed. In the foreseeable future, however, a great deal of fundamental work remains to be done before we see the commercial applications of these devices. For the memory industry, this may lead to a universal memory which would combine the cost benefits of DRAM, the speed of SRAM, and the non-volatility of Flash RAM. Potentially all logic operations on a chip can be carried out by manipulating spins in metallic systems instead of manipulating charges in semiconductor transistors, as in conventional microchips, and, moreover, could be combined on-chip with a universal memory. This would result in a new, scalable, radiation resistant, and more power efficient computers and electronic devices on which we rely in almost every aspect of our everyday life. If STT is the method of choice to control and manipulate spins in such devices, its future will be very bright.
The Exploitation of the Spin-Transfer Torque Effect for CMOS Compatible Beyond Von Neumann Computing
Published in Krzysztof Iniewski, Santosh K. Kurinec, Sumeet Walia, Energy Efficient Computing & Electronics, 2019
Thomas Windbacher, Alexander Makarov, Siegfried Selberherr, Hiwa Mahmoudi, B. Gunnar Malm, Mattias Ekström, Mikael Östling
MRAM is a high performance NVRAM suitable for SCM applications, but currently not used in the SRAM, DRAM and HDD/SSD dominated memory hierarchy. MRAM has been proposed as a universal memory that can fill all levels of the memory hierarchy. However, the up to now rather low density prohibits any serious competition with the well established HDD/SSD technology. Due to the demand of a high density for an SCM, other NVRAMs are better suitable [90,91]. Especially, a three-dimensional monolithic integration of cross-bar memory arrays is more likely to succeed. These require memory cells that use a 1D-1R memory cell architecture (see Section 4.4.3). A more realistic application for MRAM is to replace SRAM and DRAM in L2/L3 cache and primary memory, respectively. It can bridge the speed gap between the cache and the primary memory. The required high endurance has been successfully demonstrated [92] and Kitagawa et al. [93] showed that a simulated mobile CPU would use less power, if it employs MRAM instead of SRAM as L2 cache. Other examples of MRAM for cache-applications can be found in [94]. MRAM is available on the market for main memory applications (DDR3 DRAM compatible) [95]. The major benefit of replacing DRAM with a NVRAM is the removal of the refresh action, the reduction of the overall power consumption and the simplification of the circuit design.
Resistive Random Access Memory: A Review of Device Challenges
Published in IETE Technical Review, 2020
Varshita Gupta, Shagun Kapur, Sneh Saurabh, Anuj Grover
In this work, we have discussed the operating mechanism and the figures-of-merit for RRAMs. We have also reviewed the challenges of controlling variability by device design methods and also by exploring new materials and material combinations. RRAMs show promise to be used as Universal Memory. They are dense, non-volatile, scalable and do not require very high voltages for their operation. Hence, RRAMs can replace Flash memories in many applications. The high density and speed of RRAMs also make them well-suited to replace on-chip DRAMs which are not scalable and also consume more power due to the refresh requirements. The low latency of RRAMs make them suitable to replace L2 and L3 SRAM caches in many applications. The high density and the low power consumption make RRAMs attractive for use in applications such as IoT, edge-computing, and neuromorphic computing. However, the biggest challenge to industrialize RRAMs lie in tackling the variability issues. While some applications such as neuromorphic computing and machine learning are error resilient and can adopt currently developed RRAMs, other applications such as automotive, smart industry etc. would use RRAMs only after variability control is demonstrated not only at the nominal operating conditions but also at high temperatures.