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An Overview of Current Trends in Hafnium Oxide–Based Resistive Memory Devices
Published in Shilpi Birla, Neha Singh, Neeraj Kumar Shukla, Nanotechnology, 2022
Lalit Kumar Lata, Praveen Kumar Jain, Abhinandan Jain, Deepak Bhatia
Memory is a core component of any computing device because it stores data and programs. The main memory of the computing device directly communicates with the CPU. It holds the program and data currently required by the processor of the computer. Memory devices used for storage and backup are called auxiliary memory, and they contain large files and data. Magnetic disks and tapes are examples of auxiliary memory. Auxiliary memory stores all the other information, and this information is transferred to the computer's main memory when needed. Main memory is the central stage in a computer system, and it stores data and programs during the operation of a computer. The principal operation used in main memory is a semiconductor integrated circuit. RAM is an example of main memory.
Memory Organisation
Published in Pranabananda Chakraborty, Computer Organisation and Architecture, 2020
Considering the hierarchy as shown, the fastest (access time), smallest, and most expensive type of memory consists of Registers, internal to the processor. A processor nowadays typically contains a few dozen to hundreds of such registers. Now, with regard to frequency of access, the principle of locality of reference is followed here. This tells that the data most recently used is very likely to be accessed (referenced) again in the near future, and hence it is suggested to be kept in the fastest memory for improved performance. Cache memory fulfils this criteria which is of higher speed, smaller in size, but a costlier one. It is usually extended with main memory, and is not visible to the programmer, or indeed to the processor. It is placed nowadays inside the CPU (on-chip), in addition to, in between CPU and primary memory (off-chip), and is employed for the movement of data between main memory and processor register to improve performance. Typically, it is on-chip or off-chip CMOS, SRAM. Main memory is the principal internal memory system of the machine which has a unique address for each location. It is generally of larger size, relatively slower (higher access time), and comparatively less costly. The distinguishing characteristics of these three types of memory just described are based on semiconductor technology. They are volatile, and hence, must be provided with a constant power supply while in use. At the same level of main memory (RAM) in the memory hierarchy, the non-volatile Read-Only Memory (ROM) with all its variants, like PROM, EPROM, etc., are also present. Program and data are, however, stored more permanently on external non-volatile secondary mass storage devices, the most common are magnetic disk, compact disk, and tape.
Distributed Computer Control System Networks
Published in Brian Roffel, Patrick Chin, Computer Control in the Process Industries, 2017
Another important basic element of a computer is its memory. A distinction is made here between main memory and auxiliary memory. Main memory is used to store data and instructions that are used in the execution of a program. The computer main memory is random access (RAM), and the access time is short.
Spherical Harmonics and Discontinuous Galerkin Finite Element Methods for the Three-Dimensional Neutron Transport Equation: Application to Core and Lattice Calculation
Published in Nuclear Science and Engineering, 2023
Kenneth Assogba, Lahbib Bourhrara, Igor Zmijarevic, Grégoire Allaire, Antonio Galia
First, we need to determine the set of equivalence classes of the mesh with respect to the equivalence relation , called the quotient set. The underlying idea is to work in the quotient set as on the mesh, but without distinguishing between equivalent elements. It is therefore sufficient to calculate the geometric elementary matrices of each class representative. Likewise, the matrix-vector product operator is written using the canonical application , which associates each element of to its class representative. The reuse of data already present inside the cache memory reduces the need to repeatedly fetch data from the main memory. In the end, the solution of the linear system is performed without the need to assemble the matrix , resulting from the bilinear form [Eq.(8)]. It is sufficient to pass the matrix-vector product operator to the Krylov solver. The solvers implemented in NYMO based on this principle are BICGSTAB (Ref. 20) and the generalized minimal residual method21 (GMRES).
Artificial intelligence for traffic signal control based solely on video images
Published in Journal of Intelligent Transportation Systems, 2018
Hyunjeong Jeon, Jincheol Lee, Keemin Sohn
The computing environment of the present simulation was as follows. The computer main memory was 128 GB. Python main logic and traffic simulation were implemented on two CPUs with the following specifications: Intel Xeon(R) CPU E5–2697 v2 @ 2.7 GHz. There were 48 available CPU cores, which exceeded the maximum number of cores (= 32) that Vissim allows. The deep CNN was trained on a single GPU. The GPU was a NVIDIA Quadro M6000 with a 12 GB GDDR5 memory. Ironically, a graphic accelerator was used to train the deep net, whereas the animation was run on CPU cores. It should be noted that, without a GPU, training a large-scale deep net cannot be conducted within a realistic window of computing time. Under this computing environment, it took, on average, 48.36 minutes to run a single episode. The total computation time for 50 episodes was tantamount to 40 hours and 20 minutes.
A programmable ternary CPU using hybrid CMOS/memristor circuits
Published in International Journal of Parallel, Emergent and Distributed Systems, 2018
Daniel Wust, Dietmar Fey, Johannes Knödtel
Exploiting the benefits of a redundant number representation based on ternary digits with a conventional non-MLC capable memory is costly since DRAM or SRAM based flip-flops are missing the MLC feature. One would be forced to use two DRAM or SRAM cells to code one ternary digit, called a trit. This would double the DRAM space in main memory for the storage of data, thus causing a serious cut for the available resources. This is surely one of the reasons that prevented designers from using ternary coding schemes in the past. Besides, there are some further drawbacks which, however, can be overcome or at least reduced in its consequences as we will discuss and show later.