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Fabless Intelligent Manufacturing
Published in Chinmay K. Maiti, Fabless Semiconductor Manufacturing, 2023
A business that is a dedicated semiconductor fabrication facility does not design its own ICs. The term “fab” refers to anysemiconductor fabrication plant, whether run as part of an IDM (like Intel) or as a foundry (like TSMC). An application-specific IC refers to a chip that is custom-designed for a specific application, rather than for a general-purpose application. This type of company that developed in the 1980s performed the physical design and manufacturing of these application-specific ICs for other semiconductor or systems companies. An IC that integrates all components of a computer or other electronic system into a single chip is known as a system-on-chip (SOC). On a single substrate, it may contain digital, analog, mixed-signal, and sometimes radio-frequency functions. A company that designs its chip but outsources the manufacturing to a third party, either a foundry or an IDM is called the fabless company. This is the prevailing business model today. Electronic design automation (EDA) companies make the software that is used to design all modern semiconductor devices. The three dominant EDA companies today are Synopsys, Cadence Design Systems, and Mentor Graphics.
Introduction
Published in Heqing Zhu, Data Plane Development Kit (DPDK), 2020
The general-purpose processor can be integrated with additional silicon IP; then, it will evolve into SoC. The SoC system often consists of a processor, the integrated memory controller, the network I/O modules, and even hardware accelerators such as security engine and FPGA. Here are a few known SoC examples: Intel®: Xeon-D SoC, Atom SoC;Tilera: TILE-Gx;Cavium network: OCTEON & OCTEON II;Freescale: QorIQ;NetLogic: XLP.
Power Converters Used in Body Systems
Published in Dorin O. Neacşu, Automotive Power Systems, 2020
As the requirements for each Body System are increased, more and more systems feature a system-on-chip device that represents the highest level of integration. A system-on-chip (SoC) combines all required electronic circuits of various industrial computer components onto a single, integrated chip. SoC is a complete microelectronic substrate system that may contain analog, digital, mixed-signal, or radio-frequency functions. It usually includes a central processing unit (CPU) that may be multi-core, system memory (RAM), and peripheral circuits. Because SoC includes both the hardware and software necessary for the application, it uses less power, it is faster, requires less space, and is more reliable than multi-chip systems. Most system-on-chips today come inside mobile devices like smartphones and tablets.
Elementary operations: a novel concept for source-level timing estimation
Published in Automatika, 2019
Nikolina Frid, Danko Ivošević, Vlado Sruk
Systems on Chip (SoC), which are used to run modern complex applications, must have the heterogeneous structure of processing, memory and communication elements to meet high performance, energy efficiency and low price goals. Due to the exponential growth of heterogeneous system complexity, it is estimated that designers productivity will have to increase up to ten times to successfully meet system requirements and constraints within the similar time and cost limits [1]. The key to success is making good decisions in early design stages, before assembly of the first prototype. Raising abstraction level in all design phases enables separation of computation from communication and using separated application and platform models. This leads to a more efficient approach to design space exploration (DSE) [2]. Early timing estimation is one of the most important phases in DSE. In recent years, the traditional approach using highly accurate Instruction Set Simulator (ISS) has been replaced by high-level timing estimation models which enable obtaining estimates in early design stages [3–10].
Optimization Approaches for Core Mapping on Networks on Chip
Published in IETE Journal of Research, 2018
Mehdi Taassori, Sadegh Niroomand, Sener Uysal, Bela Vizvari, Abdollah Hadi-Vencheh
As very large scale integration (VLSI) technology shrinked into deep submicron, investigators create a system on a chip which is called System on Chip (SoC). However, these advances cause some problems in Systems on Chip (SoCs). Networks on Chip (NoCs) have been introduced as a solution to the communication demand in SoCs [1,2].
Design of capacitor-less LDO regulator with SCR-based ESD protection using dual push-pull stage
Published in International Journal of Electronics, 2022
Sang-Wook Kwon, Kyoung-Il Do, Yong-Seo Koo
As integration technology has advanced to allow more and more functions to be integrated into a single chip, the SoC (System on Chip) architecture has become an integrated part of modern electronic devices. In addition, since mobile devices is used a power management device (PMD) that manages battery life with high efficiency, there are many restrictions on the use of next-generation SoC (System on Chip) devices. Thus, the current PMIC (Power Management IC) is configured to have the multiple power supplies throughout the chip with a combination of an efficient switching converter and an LDO regulator, as shown in Figure 1. In general, a power management device is used for a switching regulator and an LDO regulator is used for the output stage. The proposed LDO regulator can be mainly used in miniaturised low-voltage battery-powered mobile systems such as smartphones, smart watches, personal audio systems, and wearable devices (Eul, 2006). The transient response occurred in these systems significantly is affected the power consumption of mobile devices, which is a major variable affecting battery life. As shown in Figure 2, unlike the CL-LDO (capacitor-less LDO), the conventional LDO using external capacitors requires many IC pins, which might degrade the area efficiency of the printed circuit board (PCB; Milliken et al., 2007; Rincon-Mora, 2000). Therefore, it might not be suitable to apply the embedded voltage regulators in devices with many external capacitors. Accordingly, it is necessary to develop the circuit technology to improve the power loss efficiency. Recently, the use of capacitor-less LDO has become common in SoC devices that require the embedded voltage regulators for various applications. Since the design of portable devices is performed in a small form factor, the continuous efforts should be made to develop a capacitor-less LDO regulator (Or & Leung, 2010; Zhan & Ki, 2012). In addition, the semiconductor process technology has tended to become highly integrated as the demands for semiconductor devices with high performance are increased. There is the continuously increasing demand for the circuit technology suitable for ESD-sensitive low-voltage applications used in wearables and mobile devices (Do et al., 2020). The average junction depth of a semiconductor device and the average thickness of an oxide film are both decreasing, and the design range of electrostatic discharge (ESD) is extremely narrow. The failure of the ESD integrated circuits can cause serious problems. It is an important parameter in the IC manufacturing with the high ESD endurance within a reduced chip area (Do & Koo, 2020a). To solve these problems, the proposed LDO regulator has embedded the self-designed SCR-based ESD protection circuit to prevent the IC destruction due to the static electricity (Do & Koo, 2020b; Do et al., 2019).