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Memory-Related Macros
Published in Murat Uzam, PIC16F1847 Microcontroller-Based Programmable Logic Controller, 2020
There are three basic memory types used in computers, PLCs, microcontrollers, etc., namely flash memory, SRAM, and EEPROM. Flash memory is an electronic (solid-state) non-volatile storage medium that can be electrically erased and reprogrammed. In PLCs, flash memory is mainly used to store programs. They can also be used to store constants. SRAM (Static Random Access Memory) uses flip-flop circuitry to store each bit, but it is still volatile memory as it will lose its contents when power is lost. PLCs use this memory for running the central CPU. SRAM is used to store variables. EEPROM (Electronically Erasable Programmable Read Only Memory) is a type of non-volatile memory used to store relatively small amounts of data but allowing individual bytes to be erased and reprogrammed.
Programmable Logic Control Systems
Published in L. Ashok Kumar, M. Senthilkumar, Automation in Textile Machinery, 2018
L. Ashok Kumar, M. Senthilkumar
There are a few basic types of computer memory that are in use today. RAM (Random Access Memory): This memory is fast, but it will lose its contents when power is lost; this is known as volatile memory. Every PLC uses this memory for the central CPU when running the PLC.ROM (Read Only Memory): This memory is permanent and cannot be erased. It is often used for storing the operating system for the PLC.EPROM (Erasable Programmable Read Only Memory): This is memory that can be programmed to behave like ROM, but it can be erased with ultraviolet light and reprogrammed.EEPROM (Electronically Erasable Programmable Read Only Memory): This memory can store programs like ROM. It can be programmed and erased using a voltage, so it is becoming more popular than EPROMs.
Basic Elements of Digital Circuits
Published in Nassir H. Sabah, Electronics, 2017
Figure 12.4.1 shows the classification of semiconductor memories, which are discussed in the following sections. R/W memory is of two types: static RAM (SRAM) and dynamic RAM. SRAM stores information bits in latches. Dynamic RAM stores information as charges on capacitors, which means that these charges must be refreshed periodically to compensate for inevitable charge leakage. Mask ROM is factory programmed using a photo mask and cannot subsequently be erased or reprogrammed. Programmable ROM (PROM) is similar except that it is programmed by the user, as in fuse ROM. Erasable PROM (EPROM) is erased by ultraviolet radiation, which requires removal of the chip from the board. In contrast electrically erasable PROM (EEPROM) is erased in place. Flash memory is a special type of EEPROM that allows quick erasure of large blocks of stored information. The number of allowable write operations in EPROM and EEPROM is of the order of a million or so.
Towards Neuro-Fuzzy Compensated PID Control of Lower Extremity Exoskeleton System for Passive Gait Rehabilitation
Published in IETE Journal of Research, 2023
Jyotindra Narayan, Santosha Kumar Dwivedy
The proposed LEES is designed and developed for healthy children having body parameters as age: 8–10 years, weight: 25–35 kg and height: 110–120 cm where being healthy refers to no impairment in the motor functionality. Accounting for the user’s physiological safety, the maximum allowable range of motion (ROM) for hip, knee, and ankle joints of the LEES are selected as per studies [25,26], as shown in Table 1. The joints’ ROM acts as trajectory constraints and setup the movement limitations for the user. An emergency stop/shut-down button is installed in both software and hardware interfaces to avoid any involuntary ROM or out of the specified maximum ROM while applying the control strategy. As shown in Figure 2, a child dummy with 26 kg weight and 112 cm height is utilized to validate the system’s effectiveness and safety measures. A detailed weight, length, and centre of mass (COM) specifications for lower extremity exoskeleton system and the dummy is shown in Table 2. The lower extremities of the dummy are affixed to the leg links of exoskeleton robot using Tynor splints/white tapes. As the dummy cannot apply resistive forces to the exoskeleton system, gait rehabilitation measures are considered passive.
Security in Internet of Drones: A Comprehensive Review
Published in Cogent Engineering, 2022
Snehal Samanth, Prema K V, Mamatha Balachandra
Deebak et al. have proposed a smart IoD (S-IoD) framework by using a lightweight privacy-preserving scheme (L-PPS) for a UAV environment that collects sensible information independently. L-PPS uses Chebyshev Chaotic Maps. Formal security analysis uses a software tool called Scyther, and a ROM. The proposed scheme’s informal security analysis shows that it provides data confidentiality, and is resistant to attacks like forgery, replay, password guessing, session key-disclosure, privileged insider, stolen smart card, server spoofing, DoS, drone capture, and Wi-Fi. The proposed scheme’s performance analysis shows that it has lesser computation and communication cost when compared to those of some existing authentication schemes. The experiments are performed using NS3 simulator to support protocols such as Transmission Control Protocol (TCP), User Datagram Protocol (UDP), and LTE. The experimental analysis shows that the proposed scheme has a higher throughput rate, higher packet delivery rate when compared to those of some existing authentication schemes. Also, the proposed scheme has better performance metrics like the end-to-end delay and time for each drone to connect when compared to those of some existing authentication schemes (Deebak & Al-Turjman, 2020).
Exploring the RFID mutual authentication domain
Published in International Journal of Computers and Applications, 2021
Syed Muhammad Mohsin, Imran Ali Khan, Syed Muhammad Abrar Akber, Shahaboddin Shamshirband, Anthony T. Chronopoulos
Authors of [51] have stated in their paper that MD5 and SHA require more than 16,000 logic gates for their functionality and very efficient implementation of the AES encryption algorithm needs 3400 logic gates that are not available especially in the case of low-cost RFID tags. So, the study proposes a real lightweight mutual authentication protocol that can be implemented in tags having less than 1000 logic gates. The proposed protocol is based on index pseudonyms of 96 bits length that have tag information. The research states that in order to implement the protocol, RFID tags will have to be placed within the small portion (480 bits) of rewritable memory, i.e. FRAM or EEPROM and another Read Only Memory (ROM). Simple logical operations such as AND, OR, XOR and mod are used in the proposed protocol and multiplication function has been avoided in order to keep the protocol really lightweight. Experiments showed that 100 logic gates are required for the functioning of the proposed scheme in the best case. The study provides a comparative analysis of the proposed protocol with hash-based mutual authentication protocols and they have concluded that their protocol has better benefits over many of the other hash-based mutual authentication protocols.