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Design and Functional Modules of Digital Protective Relays
Published in Vladimir Gurevich, Digital Protective Relays, 2017
There is also a special kind of memory called nonvolatile SRAM (nvSRAM). This memory can store data after disconnection of external power thanks to a built-in tiny lithium battery (see Figure 2.41). This memory is faster than EPROM and EEPROM, so sometimes nvSRAM is used as a permanent rewritable memory (i.e., another form of EEPROM). Standard SRAM can be used if we need a relatively simple low-capacity memory with low power consumption. For example, it is used for registers and cache memory.
Single-Ended 8T SRAM cell with high SNM and low power/energy consumption
Published in International Journal of Electronics, 2022
Javad Mohagheghi, Behzad Ebrahimi, Pooya Torkzadeh
For overcoming low WSNM, the WRE8T scheme has been proposed (Figure 1(c)). Weakening the left inverter during write increases WSNM in this cell (Pasandi & Fakhraie, 2014). Nevertheless, HSNM and RSNM are still insufficient at low supply voltages. To alleviate the leakage power, the designers have proposed the SB9T structure (Ahmad et al., 2017) (Figure 1(d)). In addition to having low ‘0’ WSNM, its read and write speed is also lower than other structures due to its single-ended structure. Besides, this structure has much read and write energy compared to other structures. The structure of 12T (Kim & Mazumder, 2017) (Figure 1(e)) has been proposed to improve WSNM. Besides improving RSNM, the read and write time is also suitable for this structure. However, the structure is 12T and has enormous dimensions. Moreover, it has high read and write energy, power consumption, and leakage compared to other structures. For ultra-low voltage operation, an 11T structure (He et al., 2019) was also introduced (Figure 1(F)). Compared to the previous structure, the amount of RSNMs and WSNMs has been improved. However, since it is a single-ended structure, the issue of a delay in writing ‘1’ remains. The proposed structure has a large amount of write energy and read energy, as well as huge dimensions. Recently, a seven-transistor-two-memristor (7T2 M) non-volatile static random access memory (NVSRAM) has been proposed in (Raj et al., 2011; Singh & Raj, 2019). The designed 7T2 M-NVSRAM is resilient to data loss while powered off and renders substantial read/write margins compared to the conventional SRAM. However, the structure has inferior read/write speed compared to the 6T cell in conjunction with technology cost due to additional memristors.