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The Schrödinger equation
Published in David K Ferry, Quantum Mechanics, 2001
which for the above field gives a distance of 1.3nm. The effective width of the quantum well, mentioned earlier, is larger than this, as this value is related to the ‘half-width’. This value is smaller than the actual thermal de Broglie wavelength of the electron wave packet. The quantization arises from the confinement of the electron in this small region. In figure 2.14(b), the classical charge density and that resulting from the quantization is shown for comparison. It may be seen here that the quantization actually will decrease the total gate capacitance as it moves the surface charge away from the interface, producing an effective interface quantum capacitance contribution to the overall gate capacitance (in series with the normal gate capacitance to reduce the overall capacitance). In small transistors, this effect can be a significant modification to the gate capacitance, and hence to the transistor performance.
RF/Analog and Linearity Performance Evaluation of a Step-FinFET under Variation in Temperature
Published in Suman Lata Tripathi, Parvej Ahmad Alvi, Umashankar Subramaniam, Electrical and Electronic Devices, Circuits and Materials, 2021
Rajesh Saha, Brinda Bhowmick, Srimanta Baishya
Figure 2.5b presents the total gate capacitance (Cgg) with temperature variation, and it is perceived that the amount of Cgg increases as the temperature changes from 250 to 450 K. It has already been discussed that the energy bandgap decreases with the rise in temperature, which increases the amount of gate charge, and to follow the charge balance equation, the quantity of charge in the channel section also increases. This increased charge indicates an increase in total gate capacitance as the temperature rises from 250 to 450 K. It is also observed that Cgg increases continuously with gate voltage at different temperatures, which is because of an increase in the amount of charge with gate bias.
Impact of Nanoelectronics in the Semiconductor Field
Published in Shilpi Birla, Neha Singh, Neeraj Kumar Shukla, Nanotechnology, 2022
Short-channel effects (SCE) become unacceptable when channel duration is limited relative to depletion areas, as we saw in the previous segment. This reduces the amount of gate length reduction that can be achieved. To minimize these consequences, the width of the depletion area should be decreased along with the channel length. Increases in channel doping concentration, gate capacitance, or a mixture of the two may be used to do this. The gate control over the channel can be determined by the gate capacitance. Increasing gate oxide thickness improves gate capacitance. A system with a thinner gate oxide has been found to have a smaller depletion diameter and hence better SCE characteristics.
Gaussian distribution model for gate-to-channel capacitance for carbon nanotube field-effect transistor
Published in International Journal of Electronics, 2019
Atheer M. Al-Shaggah, Abdoul M. Rjoub, Mohammed A. Khasawneh
Gate capacitance model at nanoscale transistor is very important parameter related to the performance of transistor; indeed, there are two types of capacitors in each transistor, parasitic capacitors and non-parasitic capacitors, in the case of non-parasitic capacitors, there are gate-to-drain capacitance, Cgd, and gate–source capacitance, Cgs, both affects directly the performance and frequency of transistors, while the parasitic capacitors are unwanted capacitors created and their charges remain between the layers of transistor even the transistor works properly. In fact, the total capacitance at transistor should be at minimum in order to quarantine correct operation of transistors.