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Front-End Power Converter Topologies for Plug-In Electric Vehicles
Published in Md. Rabiul Islam, Md. Rakibuzzaman Shah, Mohd Hasan Ali, Emerging Power Converters for Renewable Energy and Electric Vehicles, 2021
Chandra Sekar S., Asheesh K. Singh, Sri Niwas Singh, Vassilios G. Agelidis
Improved buck PFC converter with one auxiliary switch and two diodes, as shown in Figure 5.11, enhances the power factor with constant on-time control [23]. This converter works with a higher duty cycle to get the higher voltage gain. During the positive cycle, Vo is higher than the Vin, and the converter operates as a buck-boost mode. When the input voltage is larger than Vo, it acts as a buck mode, and when the negative cycle occurs, it can act in a negative buck-boost and buck operation. During boost operation, Q2 is ON, and Q1 is OFF, and the inductor charged. The inductor discharged when Q2 is OFF. Likewise, during the buck operation, Q1 is ON, and L is charged and Q1 is OFF, L is discharged through the load. To operate the critical continuous conduction mode (CCCM); here, they are implementing the constant on-time control with a voltage reference Vph to achieve either buck or boost mode. An error amplifier compares the reference and output voltage signals. In this work, improved the power factor and reduction in THD up to 18% is achieved.
Diodes and power supplies
Published in David Crecraft, David Gorham, electronics, 2018
A simple three-terminal IC regulator includes: A d.c. voltage referenceA sampling unit or potential divider to feed back a fraction of the output voltage to the error amplifier.An error amplifier, which supplies a current to the output transistor in proportion to the difference between the reference voltage and the sampled output voltage.A control unit, which controls output current according to the output of the error amplifier. It is usually mounted on a heat-sink to minimize temperature rise.Protection circuit which limits the output if the output current or junction temperature exceed specified limits.
On-Chip Regulators for Low-Voltage and Portable Systems-on-Chip
Published in Fei Yuan, Krzysztof Iniewski, Low-Power Circuits for Emerging Applications in Communications, Computing, and Sensing, 2018
The proposed LDO does not contain any resistors to maximize power efficiency, as illustrated in Figure 3.9. Instead, a PMOS push power transistor provides the additional current to the load, whereas an NMOS pull transistor reduces the output voltage. These power transistors are controlled by the output of the error amplifier. The error amplifier directly senses the output voltage and adjusts its output based on the difference between the reference voltage and output voltage. Two important design characteristics are the error amplifier and the static current minimization technique, as described in the following subsections.
An analytic approach for resource efficient parametric simulation of electronic circuits
Published in EPE Journal, 2020
Mario Schenk, Annette Muetze, Klaus Krischan
The error amplifier , a diode and voltage reference model an adjustable shunt regulator (such as TL431). The error amplifier is modelled as an ideal amplifier with infinite gain. The diode is used to add an additional offset to the output level of and also ensures that the amplifier can only sink the current. The optocoupler is modelled in the forward linear region by and in the saturation region by a constant voltage source . Table 3 summarizes the values for additional and modified components and parameters.
Design of capacitor-less LDO regulator with SCR-based ESD protection using dual push-pull stage
Published in International Journal of Electronics, 2022
Sang-Wook Kwon, Kyoung-Il Do, Yong-Seo Koo
Figure 5 is a block diagram illustrating the current path operating under the undershoot condition at the output stage. When the load current is increased rapidly, the undershoot voltage occurs in the output stage. The error amplifier performs a negative feedback function. The dual undershoot controller operates at the same time. Namely, the current I1, which allows the current at the gate stage of the pass element to flow to the ground node, and the current I2, which turns on the undershoot output at the output node, are generated at the same time. Thus, dual current paths are formed. During this time, the overshoot controller and the overshoot output node both remain in an inactive state.