China
Africa
Explore chapters and articles related to this topic
Digital communication systems
Published in Geoff Lewis, Communications Technology Handbook, 2013
Type 2. This is often described as a linear feedback shift register or pseudo-random binary sequence (PRBS) generator. For a series of binary bits to be in random order, each symbol must occur by chance and not be dependent upon any previous bit. Over a long period of time, the number of occurrences of ones (n1) and zeros (n0) should be equal. In addition, runs of two, three or more similar bits should be equiprobable. Sequences that very nearly meet this criterion can be generated by the arrangement shown in Fig. 7.18, where the logic states of the switches control the feedback paths through modulo-2 adders (exclusive OR gates), placed between the serial shift register input and output. The state of the switches are set according to a characteristic polynomial, to close just one of the switches S1 to Sn−1. Assuming a 4-bit register with the switches set, S1 = 1 and the other set to 0, then, irrespective of the initial states of the register cells, the binary pattern shown in Table 7.1 will be produced. The bit pattern bn is the required sequence which is generated on a periodic and cyclic basis. Changing the characteristic polynomial will produce a new sequence.
Process Modeling and Identification
Published in F. Joseph Schurk, Pradeep B. Deshpande, Kenneth W. leffew, Vikas M. Nadkarni, Control of Polymerization Reactors, 2017
Schurk F. Joseph, Deshpande Pradeep B.
Two developments of the last two decades are having a significant impact on industrial operations. One involves the concept of (linear) model-based (also called model-predictive) control having constraint handling capabilities leading to optimized control. MPC has been successfully applied to multivariable plants throughout the world. MPC utilizes the step or impulse response models mentioned in the previous paragraph. The other involves PRBS (pseudo-random binary sequence) testing, a procedure that leads to impulse responses (or transfer functions) and noise models which can be used to design deterministic or stochastic controllers.
Design and implementation of a virtual on-line lab on optical communications
Published in European Journal of Engineering Education, 2023
Dimitris Uzunidis, Gerasimos Pagiatakis
The main building blocks of an externally modulated transmitter are illustrated in Figure 1. The Pseudo-Random Binary Sequence (PRBS) module is actually the information source, as it generates a bit sequence using a mathematical process. Next, the Non-Return to Zero (NRZ) encoder converts the input bits into an electrical signal. In particular, the output NRZ pulse has a single value over the entire bit length that is the '1' bit is encoded by a high level with non-zero amplitude and the ‘0’ bit by a low level with zero amplitude. These rectangular electrical pulses are introduced into the Rise Time module which transforms them into smoother output pulses with a user-defined rise-time. This module is actually a linear time-invariant filter with a normalised Gaussian shaped impulse response. The Continuous Wave (CW) block (a laser in our simulations) generates a time-dependent field which has a user-specified power and frequency and represents the optical carrier. The final building block of the optical transmitter is a Mach-Zehnder Modulator (MZM) which, based on its input data, can induce a specified phase shift between the fields of its two arms. In particular, in case of the ‘0’ bit, due to the phase shift, a destructive interference at the MZM’s output is performed leading to an output power close to zero. In the case of the ‘1’ bit, no phase shift between the fields of its two arms is considered, resulting to a constructive interference at the MZM’s output which leads to a capable output power.
Supraharmonics reduction in LED drivers via random pulse-position modulation
Published in International Journal of Electronics, 2018
Joaquin Garrido-Zafra, Antonio Moreno-Munoz, Aurora Gil-De-Castro, Manuel A. Ortiz-López, Tomás Morales
To generate a pseudorandom binary sequence (PRBS), 16 bits shift register has been created in which the re-entrant least significant bit is calculated through a XOR logic gate combinational circuit where the operands are the last value of bits 0, 2, 11 and 15 (see Figure 6). A while loop has been used to this end, adding an unsigned integer shift register. First shift register value has been initialised with the binary pattern ‘0001011010111001’. It must be ensured that the initial value will not converge in a lock situation because the register content takes the value ‘0’ otherwise. This wrong behaviour would set to ‘0’ the value of PRBS and the proposed techniques will no longer be random. Another critical parameter is the updating frequency of the PRBS that must be greater than the switching frequency to generate a new value for each carrier wave period. Experimentally, a much higher frequency has been selected, 400 kHz.
A 10-Gbps CTLE design using split-length input pair MOS Transistors
Published in International Journal of Electronics Letters, 2022
Ahmed Shehata, Ghazal A. Fahmy, Hany F. Ragai
A Pseudo-Random Binary Sequence (PRBS) is used as a stimulus to the channel. The output of the 21-inch channel is then fed to the differential input devices of the CTLE. Output signals waveforms are observed on channel output, conventional CTLE schematic-view output, proposed CTLE schematic-view output and proposed CTLE post-layout output.