China
Africa
Explore chapters and articles related to this topic
Introduction
Published in Jerry J. Battista, Introduction to Megavoltage X-Ray Dose Computation Algorithms, 2019
The late Hans Meuer of the University of Mannheim developed a standardized way of assessing the speed of supercomputers more specifically for scientific and engineering applications. On an annual basis (www.top500.org), high performance computers are ranked in terms of their FLOP rate (FLOP/s – floating point operations per second) while solving a system of linear equations (i.e. Linpack benchmark, Rmax parameter). The term floating point refers to arithmetic operations on real numbers with fractional values. In the top-500 competition, these numbers are computed with double-precision with approximately 15 significant digits – ample accuracy for radiotherapy applications! Supercomputers broke through the PFLOP/s barrier in 2008 where P denotes peta or 1015. The fastest machine as of November 2017 is the Sunway TaihuLight installed at the National Supercomputing centre in Wuxi, China; it boasts a benchmark performance of almost 100 PFLOP/s. However, supercomputers costs several hundreds of million dollars (USD) and consume significant electrical power. More down-to-earth examples highlight gains in computational power of affordable consumer products (https://pages.experts-exchange.com/processing-power-compared/). Early Nintendo game consoles (NES, circa 1983) had a clocking speed comparable to the Apollo guidance computer that landed humans on the moon for the first time (1969). An Apple IPhone 4 (2010) has the calculation rate of a Cray-2 supercomputer of 1985, i.e. 1.6 GFLOP/s where G denotes giga or 109. An Apple watch doubles this rate to 3 GFLOP/s. An updated Nintendo Wii console yields 12 GFLOP/s, matched by a Sony Smartwatch 3. We will further explore the specific consequences of such advances on dose computation in Chapter 7.
HMMN: a cost-effective derivative of midimew-connected mesh network
Published in International Journal of Computers and Applications, 2021
The interconnection network topology is the first and foremost and the most crucial design decision of an MPC system because the performance of such a system heavily depends upon its topology. The inter-node coordination and communication performance and the fault tolerance performance incredibly improve by selecting a suitable interconnection network topology [5]. There are some k-ary n-cube [6] based topologies that have been proposed and studied [7–9]. However, these topologies are suitable only for Network-on-Chip. Hierarchical interconnection network (HIN) is a promising and plausible alternative network topology to connect millions or tens of millions of nodes [10, 11]. The merits of different interconnection network topologies are combined together to form a HIN [12]. Recently, the Sunway TaihuLight-2 MPC system [13] used a 5-level hierarchy such as computing node, computing board, super-nodes, cabinet, and a complete MPC system [14].