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Uniprocessor Computers
Published in Vivek Kale, Parallel Computing Architectures and APIs, 2019
At this level, the computer system is viewed as a machine that can interpret machine language instructions. A microarchitecture specification includes the resources and techniques used to realize the ISA specification, along with the way the resources are organized to realize the intended cost and performance goals. At this level, the viewer sees hardware objects such as the instruction fetch unit, register files, arithmetic logic units (ALUs), latches, cache memory, memory systems, IO interfaces, and interconnections, where
Microarchitectural and System-Level Power Estimation and Optimization
Published in Luciano Lavagno, Igor L. Markov, Grant Martin, Louis K. Scheffer, Electronic Design Automation for IC System Design, Verification, and Testing, 2017
Enrico Macii, Renu Mehra, Massimo Poncino, Robert P. Dick
The increased complexity of modern designs, facilitated by the advent of aggressively scaled technologies and the pressure of time-to-market constraints, called for modifications to the way ICs are designed. This resulted in the use of tools at higher levels of the design process. Today, design techniques and tools are available to assist in estimating and optimizing power consumptions at the microarchitectural (register-transfer level [RTL]) and system levels, in addition to lower levels of the design process. At these levels, basic design entities are no longer elementary objects such as transistors or logic gates, but rather blocks capable of performing complex functions. Typical components at the microarchitectural level include datapath macros (such as adders and multipliers), storage elements (such as registers and memory banks), communication resources (e.g., buses), and steering elements (e.g., multiplexors and codecs). At the system level, entire microprocessors or wireless communication interfaces may be used as building blocks. As a result, it has been necessary to develop power modeling and optimization techniques well suited for the RTL and above, many of which are available for industrial use.
Performance optimization of energy harvesting solutions for 0.18um CMOS circuits in embedded electronics design
Published in Cogent Engineering, 2020
The micro-architecture level considers the integration of many of the underlying fundamental device technologies. Transistor technologies and silicon processes are combined into useful blocks such as memory, control, and arithmetic that together form computational device, often a processor or an accelerator. The scope for that integrated device is very broad, including ultralow power embedded devices, through general-purpose processors, up to high-performance network-on-chip components. Current manufacturing of semiconductor devices has hit a fundamental efficiency limit called the “energy wall” that prevents reduction of energy consumption when transistor size scales down for forthcoming technology nodes. Both at small-scale Embedded Systems and at a large-scale HPC/Data centers (Din et al., 2014; Lu et al., 2011). The ultimate limits from architecture designs are almost impossible to drive, but based on current technology, there is general agreement by academia and industry that new architectures are more promising to significantly reduce power consumption than improving the energy consumption of the basic switching device in the circuit. The amount of energy consumption from a circuit architecture design for a given CMOS technology node is heavily dependent on how specific (i.e., optimized for a single or few tasks) or how general (i.e., undertake many different computations) a design has to deliver. Applications Specific Integrated Circuits (ASICs) designed for a single task can be optimized proving the lowest energy consumption, but such designs have no flexibility and cannot be reprogrammed. For microprocessors or microcontrollers that must be able to undertake a wide range of tasks, optimization to reduce energy consumption is significantly more difficult. Micro-architecture exploits what is physically possible with contemporary technology and presents an interface through which other hardware and software can use the device. In hardware terms, this interface is, of course, physical and will typically obey a specified protocol. In software terms, the processing device presents a set of possible operations through an Instruction Set Architecture (ISA). If the ISA is a description of the behaviors of the device, then the microarchitecture is the implementation of those behaviors. Advances in physics, transistor design, and device manufacturing techniques can benefit microelectronic devices of all kinds; however, microarchitecture design decisions are heavily influenced by the target market of the resultant product. While all devices strive to achieve good efficiency, balancing performance and power consumption, the application area will dictate design constraints such as size, the energy budget, and maximum power. We may group micro-architecture characteristics grouped into four areas: deeply embedded, embedded/mobile, general purpose, and servers/high-performance. These are not necessarily strict boundaries and properties often transfer between areas over time, as technology or commercial pressures permit. At present, micro-architectures have significantly different drivers for HPC/data centers, general purpose, and embedded systems/portable systems.