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Hardware and Implementation
Published in Naim A. Kheir, Systems Modeling and Computer Simulation, 2018
Sajjan G. Shiva, Mahmoud Mohadjer
An A/D converter usually consists of two main sections: a sample-and-hold section followed by an A/D converter section. The purpose of a sample-and-hold section is to take a sample from the input analog signal and hold it for a short time to allow the A/D converter to complete its function before the next sample is taken. Figure 12.7 shows a typical sample-and-hold device (zero-order hold) using an operational amplifier. During the sampling interval the sampler switch closes momentarily, and the capacitor C charges up and tracks the input analog voltage x(t). When the input signal is disconnected by the sampler, the capacitor continues to hold, for a short time, the input signal value immediately before disconnection. In practice, the output of the hold device is not constant in response to an input signal but rather decays exponentially with a large time constant. The effectiveness of the zero-order hold as a device, to convert the input pulses into a rectangular pulse wave of a certain width, depends on the sampling frequency (Kuo, 1963). The zero-order hold function improves by increasing the sample rate.
Data Conversion
Published in Dale Patrick, Stephen Fardo, Vigyan ‘Vigs’ Chandra, Electronic Digital System Fundamentals, 2020
Dale Patrick, Stephen Fardo, Vigyan ‘Vigs’ Chandra
Quantities which can change their magnitude continuously are termed as analog quantities, whereas the ones which exhibit discrete jumps in their magnitude are termed as digital quantities. Transducers are used to convert these physical quantities into electrical signals. Sample and hold circuits are used to take a snapshot of an analog quantity so that it can be converted into an equivalent binary number.
Switched-Capacitor Circuits
Published in Tertulien Ndjountche, CMOS Analog Integrated Circuits, 2017
A sample-and-hold circuit is commonly used at the interface between analog and digital systems to hold a sample of the time-varying signal for a period of time so that the high-frequency operation is facilitated. It is commonly realized by combining switching devices, such as MOS transistors, and capacitors.
Determination of Proper Ultrasonic Frequency Based on Wall Thickness of the Metal Pipes in Ultrasonic Tomography Systems
Published in IETE Journal of Research, 2021
Javad Abbaszadeh, Mansour Mostafapour
Furthermore, the sampling method of the signal received in this unit is shown in Figure 11(b) such that four signals explain the performance of the sample and hold circuit. The top signal labelled as the Tx pulse is sent from a microcontroller to an ultrasonic transceiver to excite it. Another transceiver (acting as the receiver) obtains the signal and converts the pulse signal into an ultrasonic AC wave signal (Rx Signal). The control signal controls the sample (high) and hold (low) mode. When the control signal is low and is sent to the logic input connected to the sample and hold IC (LF398N), sampling on the input signal will stop and will hold the voltage at the output. A sample and hold circuit is used for converting the AC signal to a DC voltage, which is carried out by holding the constant analog value for a short time.
Periodic sampling: maximising the sampling period
Published in International Journal of Control, 2020
The most common technique currently utilised in sampled-data control systems is the so-called sample-and-hold technique. In this technique, a constant input signal is delivered to the controlled system Σ between samples, instead of the optimal input signal developed in the present paper. In Section 5, we use an example of a single-link manipulator to compare the outcome of the optimal input signal derived in this paper to the outcome of the sample-and-hold technique. In this example, optimal input signals permit a substantially longer sampling period than the longest sampling period achievable via sample-and-hold. Naturally, other examples may yield greater or lesser improvements. In any case, by its nature of optimality, the optimal technique developed in this paper always yields a maximal sampling period.