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Published in Philip A. Laplante, Comprehensive Dictionary of Electrical Engineering, 2018
RAMA radio frequency integrated circuit (RFIC) integrated circuit designed to operate at radio frequencies as amplifiers, mixers, oscillators, detectors or combinations of above. Typically, RFICs are configured for specific application to operate as a complete RF system. radio frequency interference (RFI) electromagnetic phenomenon that either directly or indirectly contributes to degradation in the performance of a receiver or other RF system, synonymous with electromagnetic interference. See also electromagnetic inteference. radio horizon the maximum range, from transmitter to receiver on Earth's surface, of direct (line-of-sight) radio waves. This is greater than the optical horizon, because the radio waves follow a curved path as a result of the continuous refraction it undergoes in the atmosphere. radio local loop See wireless local loop. radix the base number in a number system. Decimal (radix 10) and binary (radix 2) are two example number systems. radix complement in a system that uses binary (base 2) data negative numbers, can be represented as the two's complement of the positive number. This is also called a true complement. Radon transform for a function f (x, y), r (d, ), is the line integral along a line inclined at angle from the y axis and at a distance d from the origin. radwaste a contraction for "radioactive waste," usually referring to mildly radioactive sludge removed from the coolant in a nuclear reactor. RAID disks. See redundant array of inexpensive
60 GHz Multiuser Gigabit/s Wireless Systems Based on IEEE 802.11ad/WiGig
Published in Christopher Siu, Krzysztof Iniewski, IoT and Low-Power Wireless, 2018
Koji Takinami, Naganori Shirakata, Masashi Kobayashi, Tomoya Urushihara, Hiroshi Takahashi, Hiroyuki Motozuka, Masataka Irie, Kazuaki Takahashi
At mmWave frequencies, it is possible to implement beamforming capability in a small form factor by using a phased array antenna. This enables expansion of the transmission and reception angles as well as increase of communication distance by improved antenna gain. Figure 11.6 shows the block diagram of the transceiver chipset, which consists of the radio frequency integrated circuit (RFIC) and BBIC [26]. The RFIC employs direct conversion architecture with 4Tx/4Rx RF signal paths. The RF phase shifter is inserted in each RF path, which introduces the required phase shift. The amount of phase shift required is determined by a code book, which is a look-up table that stores the required phase shifts for individual beam directions. The output power is adjusted by the automatic power control loop that detects the output power at the power amplifier (PA) output by the envelope detector that is digitized by an 8-bit 1 MHz analog to digital converter (ADC) and fed back to the digital signal processor. This feedback loop is also utilized to compensate for other performance impairments such as the carrier and the image leakages by the calibration schemes presented in ref. [27]. The power management unit (PMU) integrates low dropout regulators that provide regulated 1.25/1.4 V DC voltages from a 1.8 V power supply to improve external noise tolerance. The average total power consumption of the chip set is less than 1 W.
Variable Gain Amplifier
Published in Kaixue Ma, Kiat Seng Yeo, Low-Power Wireless Communication Circuits and Systems, 2018
Bharatha Kumar Thangarasu, Kaixue Ma, Kiat Seng Yeo
This chapter describes the variable gain amplifier (VGA) used in the radio frequency integrated circuit (RFIC) transceiver. The VGA is a key RF frontend building block that supports reliable mobile communication of wireless transceivers. The range of the VGA gain control also determines the receiver input dynamic range that provides a stable regulated power to the baseband chipset. The recent RFIC design focuses on high-data-rate communication in the gigabit per second (Gbps) range [1]. Hence, the VGA that interfaces with the baseband may need to support wide bandwidth. As the state of the art improves, the supported applications as well as the design density for the system integration of the RF transceivers also gradually move toward system-on-chip (SoC) solutions.
Optimization of On-Chip Meander Line Resistor by Using DOE Method
Published in IETE Journal of Research, 2022
Goon Weng Wong, Norhayati Soin
Today’s rapid growth in the commercial wireless communication technology has heightened interest in low-cost and high-performance radio frequency integrated circuit (RFIC) applications. New applications and the development of next-generation RF wireless electronic technology systems are becoming more challenging. Many studies have been conducted on system-on-chip (Soc) technology [1] and also system-on-package (SoP) [2] to integrate all active and passive off-chip components into a single chip. It is because of the stringent market requirement to ensure quality, smaller sizes, enhancement on performance and low operating cost. A number of papers had been published aimed at improving the on-chip passive component, such as the on-chip resistor [3–5]. It has brought about many RF wireless applications [6–8]. In the past, the straight line resistor performed poorly on CMOS substrates [9] because having a low sheet resistance has limitations for RFIC applications. However, this problem was able to be resolved with the invention of the meander line resistor by increasing the resistance [10,11]. Recently, most researchers in the RFIC field have presented scalable and accurate modeling on-chip meander line resistors in the silicon process to optimize the performance [10–13], but improving Q-factor in on-chip resistors for operations at high frequencies are few. The figure of merit of any resistance is given by its Q-factor. A low Q-factor resistor means its resistance value is less affected by the reactive capacitive and inductor component. It is an important parameter to be considered for resistor performance. As frequency increases, the parasitic effects of the on-chip resistor become a complication. The reason is that the substrate losses of the on-chip resistor in silicon technologies which are induced by mutual capacitance coupling, parasite inductance and resistance effect are associated with meander line resistor physical layouts [14–18]. The advantage of the low Q-factor for RFIC is allowing more wireless applications operating at high frequencies such as an attenuator, impedance matching, VCO and stabilizing. Therefore an attempt to design a particular resistance with the lowest quality factor at the desired frequency is challenging. This is because most applications of the on-chip resistor have limitations in achieving low Q-factor and require a larger size configuration to have high resistance value during operating at high frequency.