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Transfer functions and cameras
Published in Neil Collings, Fourier Optics in Image Processing, 2018
Modern cameras deliver a very homogeneous and stable dark image which is beneficial especially in low light applications. The speed of simple camera processing operations has been improved by the use of FPGA based frame grabber cards. The low-voltage differential signalling (LVDS) interface, which is supported by many image sensor manufacturers in their products, specifies the electrical characteristics of a differential, serial communications protocol, to enable camera developers to route the data output from a CMOS image sensor directly into an FPGA. Each pair of such signals enables data to be transferred from the image sensor to the FPGA at rates at about 600 Mbit/sec. Separate clock sources are used to enable the FPGA to accurately recover synchronized data from the imager. LVDS channels have a low susceptibility to noise because sources of noise add the same amount of common-mode voltage to both lines in a signal pair. The use of LVDS interface on sensors, in general, reduces power consumption, which is important when the power budget is critical.
Low-Power and Low-Voltage Communication for SoCs
Published in Christian Piguet, Low-Power CMOS Circuits, 2018
Because of the large power consumption of off-chip interconnect, a reduced voltage swing on these is very profitable. The risk when using low voltage swing is that the interconnect becomes vulnerable to noise. Therefore, most low swing off-chip interconnect use differential signaling [13], which is much less sensitive to noise. A modern standard using differential signaling is LVDS [26]. Because LVDS is aimed for high speeds, it utilizes terminated wires.
Computing System Elements
Published in Stephen Horan, Introduction to PCM Telemetering Systems, 2017
The specifications for the LVDS standard sustain cable lengths up to 10 m. For short, high-quality cables up to 1 m in length, the signaling electronics sustain data rates of 1 Gbps. For 10-m cables, the data rate drops to approximately 200 Mbps. The quality of the cabling and the noise environment factor in the maximum data rate determination.
Low-cost and high-performance visual guidance and navigation system for space debris removal
Published in Advanced Robotics, 2021
Shinichi Kimura, Eijiro Atarashi, Taro Kashiwayanagi, Kohei Fujimoto, Ryan Proffitt
The interface board supports image storage and various interface capabilities of the processing unit (Figure 5). The interface board has a 2 GB NAND non-volatile flash memory, which can store more than 2,000 frames of 1 MB images. Additionally, the interface board supports two channels of a de-serializer interface for the camera head units: the RS-422 command and telemetry serial interface and a low-voltage differential signaling (LVDS) bit-stream output interface for real-time image transmission through a direct connection to the transmitter. For real-time image transmission, a high-precision oscillator was implemented.