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Design and Performance Evaluation of Energy Efficient 8-Bit ALU at Ultra-Low Supply Voltages Using FinFET with 20 nm Technology
Published in Durgesh Nandan, Basant K. Mohanty, Sanjeev Kumar, Rajeev Kumar Arya, VLSI Architecture for Signal, Speech, and Image Processing, 2023
Vallabhuni Vijay, Pittala Chandra Shekar, Shaik Sadulla, Putta Manoja, Rallabhandy Abhinaya, Merugu Rachana, Nakka Nikhil
The FinFET works the same as that of Conventional MOSFET. It operates in two modes: (i) enhancement mode and (ii)depletion mode. The working characteristics are identical in both modes, but the only difference is that, in the enhancement mode, if no voltage is given to the gate terminal, it does not conduct whereas in the depletion mode, if the voltage is applied to the gate, it does not conduct. In the enhancement mode when the voltage is applied to the gate terminal, a parallel plate capacitor is formed. The gate is made up of the oxide layer. The surface below the oxide layer is located between the source and drain. When a small amount of positive voltage is applied to the gate concerning the source, a depletion region is formed. This region is reversed to n-type by the applied positive voltage. Then a region is formed at the interface between Si and SiO2. This applied positive voltage attracts the electrons from the source terminal to the drain terminal. By this, an electron reach channel is formed. The flow of current starts by applying a voltage between the source and drain. This flow of current is dependent on the voltage applied to the gate.
Metal-Oxide-Semiconductor Field-Effect Transistors
Published in Mike Golio, RF and Microwave Semiconductor Device Handbook, 2017
Leonard MacEachern, Tajinder Manku
The threshold voltage of a MOSFET depends on several transistor properties such as the gate material, the oxide thickness, and the silicon doping levels. The threshold voltage is also dependent upon any fixed charge present between the gate material and the gate oxides. MOSFETs used in most commodity products are normally the “enhancement mode” type. Enhancement mode n-type MOSFETs have a positive threshold voltage and do not conduct appreciable charge between the source and the drain unless the threshold voltage is exceeded. In contrast, “depletion mode” MOSFETs exhibit a negative threshold voltage and are normally conductive. Similarly, there exists enhancement mode and depletion mode p-type MOSFETs. For p-type MOSFETs the sign of the threshold voltage is reversed.
Power MOSFET
Published in Dorin O. Neacşu, Automotive Power Systems, 2020
The enhancement-mode MOSFETs are the common switching elements in most applications because they act as open circuits (are in the off state) when there is no voltage applied to gate (VGS = 0), and act as closed-circuit (are in the on-state) when gate is controlled. The control voltage for the gate circuit depends on the type of the MOSFET device. The NMOS can be turned on by pulling the gate voltage higher than the source voltage, while PMOS can be turned on by pulling the gate voltage lower than the source voltage. Either way, it means that pulling gate voltage toward its drain voltage turns it on.
A dynamic power control scheme for a standalone solar photovoltaic system using multiport DC–DC converter
Published in Energy Sources, Part A: Recovery, Utilization, and Environmental Effects, 2022
Muhilan Paramasivam, Dibyaraj Krishna Behera, Anand Issac, Senthilkumar Subramaniam, Namani Rakesh
The DIOBB converter with is assembled with using N-channel enhancement mode MOSFET (SUP90140E-GE3) with ratings of ID = 90 A, VDS = 200 V and schottky diodes (MBRF30200CT) of forward current If = 30 A and Vrrm = 200 V, 50 µH inductor with an input and output capacitors of 500µF were used. The value of the inductor (L) was chosen with a view to obtain CCM operation. The selection of the output capacitor depends on switching frequency and the ripple on output voltage. A 2 KW simulator for solar array was made use of as PV panel power source with a 36 V, 7.2 Ah lead acid batteries. Two 35 W incandescent bulbs and two 50 Ω/5 A rheostats were used as loads. The time multiplexing control strategy was implemented by using dSPACE DS1103 RTI board, supported by real-time interface to control desk software. It is used to deliver the gate pulses to the gate driver circuits with the help of digital logic circuits. The gate driver circuits for MOS-FET switches are implemented with HCPL-3120 optocouplers.
An Overview on MOSFET Drivers and Converter Applications
Published in Electric Power Components and Systems, 2021
Mustafa Ergin Şahin, Frede Blaabjerg
The invention of Parks provides a resonant switching for a FET and associated circuits such as power supplies with synchronous output rectifiers. The resonant switching for a JFET starts a bipolar mode operation with a diode clamping of the gate, which efficiently uses bipolar mode operation without a separate bias power supply [59]. A new gate driver apparatus is invented as an energy recovery circuit. These apparatus use a first loop circuit to discharge the energy from the gate capacitor to an inductor when the gate driver is turned off and use a second loop circuit to release the energy from the inductor to the power supply when the gate driver is turned on [60]. A matching circuit for coupling a MOSFET driver to the gate of an enhancement mode JFET is optimized for driving a MOSFET in this invention [61]. A complicated high-speed MOSFET output driver is invented at the low voltage and high voltage sides. This driver includes a voltage level shifter stage that changes an input signal at a first voltage level to an output signal at a second voltage level [62]. A circuit package providing isolation between a controller on the primary and secondary sides of a switched power supply is invented [63]. The other invention describes a system architecture of dynamic MOSFET gate driver and control scheme is adjust both the turn-on and the turn off resistance of gate driver within a single switching cycle, reduce the electromagnetic interference in the system and, minimize the conduction loss of a power MOSFET during operation [64].
A high-performance 5-to-2 compressor cell based on carbon nanotube FETs
Published in International Journal of Electronics, 2019
Mehdi Bagherizadeh, Mohammad Hossein Moaiyeri, Mohammad Eshghi
In order to evaluate the performance of the proposed design and the other classical and state-of-the-art 5-to-2 compressors, extensive simulations are conducted using the HSPICE simulator and 32 nm CMOS and the Stanford comprehensive CNFET model (Deng & Wong, 2007a, 2007b) at 0.65 V and 0.9 V supply voltages. The Stanford standard CNFET model has been designed for the enhancement-mode unipolar MOSFET-like CNFETs. In this model, each transistor can have one or more CNTs under its gate. This model also evaluates a realistic, circuit-compatible CNFET structure and contains source/drain and gate resistances and capacitances, Schottky-barrier effects at the contacts, CNT charge screening effects, doped source–drain extension regions, and substrate bias effect. Some important parameters of this CNFET model are described briefly in Table 2.