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Transistors
Published in John Okyere Attia, Circuits and Electronics, 2017
MOSFET amplifiers can be common-source, common-drain, or common-drain common-gate amplifiers. A common-drain amplifier has relatively high input resistance, low output resistance with voltage gain that is almost equal to unity. The common-source amplifier, shown in Figure 7.37, has characteristics similar to those of the common-emitter amplifier. However, the common-source amplifier has a higher input resistance than that of the common-emitter amplifier.
Electronic Circuits
Published in Dale R. Patrick, Stephen W. Fardo, Electricity and Electronics Fundamentals, 2020
Dale R. Patrick, Stephen W. Fardo
A common-drain amplifier has the input signal applied to the gate and the output signal removed from the source. The drain is commonly connected to one side of the input and output. Common-drain amplifiers are also called source followers. This circuit has similar characteristics to those of the common-collector bipolar amplifier.
MOS Amplifier Design Methodology for Optimum Performance
Published in IETE Journal of Research, 2020
Abir J. Mondal, Paromita Bhattacharjee, Pinaki Chakraborty, Bidyut K. Bhattacharyya
The methodology proposed here has been applied to five different amplifier architectures as shown in Figure 2–6. A CS amplifier with a resistive and a diode-connected load is depicted in Figures 2 and 3, respectively. The output Vout at the drain terminal of M1 is obtained by converting the overdrive voltage Vov variation into a small signal drain current Id and subsequently its flow through Rd. The common drain (CD) amplifier shown in Figure 4 also senses the input at its gate terminal like CS stage, but produces an output voltage Vout at the source terminal. Since the output voltage at the source follows the input gate voltage, CD amplifier is also called source follower. It is used as a voltage buffer.
Design of a new low-phase-noise millimetre-wave quadrature voltage-controlled oscillator
Published in International Journal of Electronics, 2018
Zeinab Kashani, Abdolreza Nabavi
Design of a low-PN VCO in mm-wave is very challenging. We utilise a differential version of the Colpitts VCO for the sake of rejecting common-mode ground noise and obtaining good PN performance. However, the conventional Colpitts oscillator suffers from some difficulties, such as the start-up issue (Heydari, Bohsali, Adabi, & Niknejad, 2007; Li & Rein, 2003; Nicolson et al., 2007; Perndl et al., 2004). By solving these problems, we can design a structure with superior performance. Concerning the start-up issues, some gm enhancement method has been presented. In Li et al. (2005), the effective transconductance enhances, and improves the start-up behaviour of the Colpitts oscillator, by combining the conventional common-gate configuration Colpitts oscillator with the cross-coupled pair topology. However, because of the stack connection, the power supply has to be increased. In L. Li, Reynaert, & Steyaert (2011), by using the Miller capacitance, a gm enhancement and a PN reduction technique, a PN of −102 dBc/Hz at 1 MHz offset from 57.6 GHz carrier is achieved, consuming 7.2 mW from a power supply of 0.6 V. In Chen, Mouthaan, & Lin (2010), common drain Colpitts oscillator is designed using a parasitic cancellation technique which improves the negative resistance and increases the maximum operating voltage. This oscillator has a measured PN of −98.5 dBc/Hz at 1 MHz offset from 28.33 GHz carrier, consuming 13 mW from a power supply of 1.8 V.
Design and Analysis of 30 GHz CMOS Low-Noise Amplifier for 5G Communication Applications
Published in IETE Journal of Research, 2023
K. Dineshkumar, Gnanou Florence Sudha
In [19], the LNA schematic of a three-stage, the single-ended cascode design is implemented for 75–91 GHz. To achieve high gain, good isolation, robustness, and variation in the model, the cascode topology is proposed in that design. This design is implemented in the 0.65 µm CMOS technology with a gain and noise figure (NF) that measures 15 and 6.4 dB, respectively. An LNA with a two-stage single-ended design was presented in [20], in which a common-base amplifier is the first stage and a common-emitter cascode amplifier is the second stage. The design amplifies the signal with a gain of 8 dB and NF is < 5 dB. The LNA with improved gm linearization is designed in [21] and an LNA design with wideband input matching and noise cancellation is presented in [22,23]. A wideband cascaded LNA [24] is designed for the 3 dB bandwidth that provides a gain of 10.7 dB and a noise figure of 4.5–5.6 dB for 29 GHz. In [25], a multiband and multi-tunable cascode LNA for 28 GHz is designed that attains a gain of 17.4 dB with a noise figure of 4 dB. An ultra-wideband LNA is presented [26] in the 45 nm technology for 24-44 GHz which has a gain of 20 dB and a noise figure of 4.7 dB. A three-stage multi-band LNA is designed in [27] with a noise figure of 4 dB and a gain of 23 dB at the 28–38 GHz frequency range. A multi-band low-noise amplifier [28] is designed for 5G communication that employs a single-input wideband matching circuit providing a noise figure of 3.8 to 4.9 dB and a gain of 8.5–12.5 dB in 0.316 mm2 area. A two-stage low-noise amplifier, which comprises common-gate and common-drain stages, has been designed in a 45 nm CMOS process that achieves a gain of 15.7 dB and a noise figure of 3.2 dB at a 28 GHz frequency range [29].