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Hybrid Cartesian Genetic Programming Algorithms: A Review
Published in Siddhartha Bhattacharyya, Václav Snášel, Indrajit Pan, Debashis De, Hybrid Computational Intelligence, 2019
Johnathan Melo Neto, Heder S. Bernardino, Helio J.C. Barbosa
The generation of computer programs utilizing Genetic Programming (GP) techniques has drawn the interest of many scientists after the publication of Koza’s book [41]. Since then, researchers have been developing new ideas to improve GPs performance and expanding its applicability. Some of those GP applications include discrete-time optimal control problems [50], financial trading, bioinformatics, and many others [62]. In this direction, Cartesian Genetic Programming (CGP), primarily proposed in [51], is a form of GP in which a computer program is described as a directed-indexed-acyclic graph. CGP represents a node grid addressed by a Cartesian coordinate system. Its genotype is constituted by function, connection, and output genes. The function genes represent the nodes’ functionalities by utilizing a look-up table, the connection genes define the nodes inputs, and the output genes define the programs outputs. In its primary version [54], CGP uses the (1 + λ) Evolution Strategy (ES) [65].
Design and Evaluation of Multipliers Using Simulated Annealing and Partitioning Approach
Published in IETE Journal of Education, 2023
Pavitra Y.J., Jamuna S., Manikandan J.
Evolutionary algorithms (EAs) are bio-inspired [15] metaheuristics for creating [16], optimizing and restructuring designs [17, 18] and this type of approach started gaining attention from the work proposed in [19]. Cartesian genetic programming (CGP) for approximate multiplier circuit design and optimization is proposed in [20, 21]. Implementation of multipliers using polymorphic gates and optimization using CGP is proposed in [22]. The design of hybrid multipliers using bio-inspired CGP is proposed in [23]. Evolutionary algorithms were used to realize multipliers using multi-virtual reconfigurable circuit cores in [24]. The realization of 3-bit multipliers using functional multipliers encoded with small redundancy is proposed in [25, 26]. A detailed study on 3-bit multipliers and even-parity circuits by optimizing CGP parameters and mutation rate is proposed in [27] and it is concluded that a combination of SA and CGP yields better circuits [28]. Although CGP is widely used, it has difficulties working with complex circuits like multipliers [29, 30]. It is reported in [31, 32] that the most complex circuit evolved from scratch using 2-input gates is a 4-bit multiplier.
Realization and Optimization of Combinational Circuits Using Simulated Annealing and Partitioning Approach
Published in IETE Journal of Research, 2023
Y.J. Pavitra, S. Jamuna, J. Manikandan
Genetic programming (GP) helps a candidate solution not to get stuck at local minima and has a better representation of circuits. Hence, GP started gaining interest in the design of digital circuits. Standard GP for gate optimization is proposed in Ref. [19], with a large population size for the design of small circuits. Realization time increases for circuits with a larger population. Matlab simulation with a two-dimensional chromosome representation of the circuit and population size of 200 and 300 for the optimization of gate count and transistor count of simple circuits is proposed in Refs. [20,21], respectively. Graphical representation of circuits using Cartesian genetic programming (CGP) outperforms GP and circuits were realized using CGP for gate count optimization in Refs. [22,23] with a population size of 300 and 10 lakh preset generations in Ref. [22]. A survey of factors to be considered for reducing the gap between the industry and evolvable hardware using CGP is proposed in Ref. [24] and discusses the significance of transistor optimization and levels to improve area on chip and speed, respectively. It confirms the significance of the realization of circuits from scratch using evolutionary methods and the flexibility of metaheuristics to design approximate circuits which the conventional synthesis tools fail to construct. The design of approximate multipliers and adders was carried out in Ref. [25] to reduce power in error-resilient systems. CGP for the design of benchmark circuits and transistor count optimization is proposed in Ref. [26] with descriptive statistics analysis. It uses high-end processors (28 cores) and 10-lakh generations. Transistor optimization was carried out on reference circuits obtained from domain experts using a point mutation operator.
Cooperative coevolution of expressions for (r,Q) inventory management policies using genetic programming
Published in International Journal of Production Research, 2020
Rui L. Lopes, Gonçalo Figueira, Pedro Amorim, Bernardo Almada-Lobo
Concerning the approach to solve the problem, the work can be extended by targeting larger and more diversified datasets in order to provide a broader view of the sensitivity of the solutions as well as its generalisability. Different genetic programming representations can also be used to model the solutions, such as Cartesian Genetic Programming, Gene Expression Programming, Generative Developmental Systems, amongst others.