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Power Electronics
Published in Timothy L. Skvarenina, The Power Electronics Handbook, 2018
Kaushik Rajashekara, Sohail Anwar, Vrej Barkhordarian, Alex Q. Huang
During a typical inductive turn-off process, the voltage of a switch will rise and its current will decrease. During the transition, the device observes both high voltage and high current simultaneously. Figure 1.72 depicts the typical voltage-current trajectory of an inductive turn-off process as is the case in the buck circuit shown in Figs. 1.70a and b, between t4 and t6 in time domain. The current of the device stays constant while its voltage rises. Its current begins to decrease once its voltage reaches its nominal value. The voltage spike is caused by the dI/dt and stray inductance in the current commutation loop. On the I-V plane of the device, the curve that defines the maximum voltage and current boundary within which the device can turn off safely, is referred to as the reverse-biased safe operation area (RBSOA) [4] of the device. Obviously, the RBSOA of a device should be larger than all its possible turn-off I-V trajectories. Devices without a large enough RBSOA need an external circuit (such as an auxiliary soft-switching circuit
C&G Unit 203: Electrical installations technology and renewable energy systems
Published in Trevor Linsley, Basic Electrical Installation Work, 2018
A transient over-voltage, or surge, is a voltage spike of very short duration. It may be caused by a lightning strike or a switching action on the system. It sends a large voltage spike for a few microseconds down the mains supply which is sufficient to damage sensitive electronic equipment. Supplies to computer circuits must be ‘clean’ and ‘secure’. Mainframe computers and computer networks are sensitive to mains distortion or interference, which is referred to as ‘noise’. Noise is mostly caused by switching an inductive circuit which causes a transient spike, or by brush gear making contact with the commutator segments of an electric motor. These distortions in the mains supply can cause computers to ‘crash’ or provoke errors, and are shown in Fig. 3.69.
Practical digital circuits
Published in T.J. Stonham, Digital Logic Techniques, 2017
where L is the inductance of the wire. Suppose a current of 20 mA flows for 100 nanoseconds when a gate switches. If the distributed inductance is 10 “4 henrys, then a voltage of 20 V is induced on the power rails. This voltage spike can cause serious malfunction and possible damage in the logic circuits. The induced voltage can be removed by connecting small radio frequency capacitors between the supply input and earth pins of each logic circuit. The capacitors decouple the power supply and effectively short-out the high frequency spikes. Typical values for the capacitors are 0.002 μF to 0.1 μF depending on the size of the integrated circuit package.
Design and analysis of isolated high step-up Y-source DC/DC resonant converter for photovoltaic applications
Published in Energy Sources, Part A: Recovery, Utilization, and Environmental Effects, 2023
Harinaik Sugali, Shelas Sathyan
In order to meet the safety regulations in a grid-connected PV system, isolated converters are needed (Zaoskoufis and Tatakis 2021). Adding a high-frequency transformer (HFT) can increase the converter’s power density at a lower cost. In isolated converters, a high turn ratio in the transformer yields higher voltage gain. However, adding a higher number of turns causes increases in parasitic capacitance and inductance, which result in a significant voltage spike (Kim et al. 2021). The current ripple at the input side is another significant concern in the PV system and it will impact on the converter performance (Elkhateb et al. 2014). Interleaved topologies reduce the current ripple and improve power handling capacity (Ye et al. 2020). The current-fed converters have inherent shoot-through (ST) protection, high gain, and minimal current ripple at the input side. As a result, it requires a lower number of turns in the HFT. Nevertheless, semiconductor devices in current-fed converters experience high-voltage spikes at turning off instants (Prasanna, Rathore, and Mazumder 2013). Hence, traditional resistor-capacitor-diode (RCD) snubbers have been used to reduce these voltage spikes (Tibola et al. 2017). Most of the converters mentioned above operate with limited switching frequency since they are hard switched. In (Sathyan et al. 2015), soft-switching (zero voltage switching (ZVS)) was implemented using an active clamp technique for better conversion efficiency. However, active clamp circuits result in enormous current stress on the components, increased cost, duty cycle loss, and circuit complexity.
A Highly Efficient PFC Flyback Converter for Residential Lighting with Universal Input
Published in IETE Journal of Research, 2023
Rajesh Narayan Deo, Ashish Shrivastava, Kalyan Chatterjee
The voltage across the capacitor reaches its highest value at the minimum input power and maximum line voltage. It reaches its lowest value with the minimum input power and maximum line voltage. Hence, the maximum voltage (VDCmax) that occurs across the capacitor at no load condition is given by Next is to find the highest voltage stress across the power switch, which depends on the reflected voltage (VR) of the flyback across the primary side winding, when Switch M is off. Then voltage stress across MOSFET is given as where, VDSmax = Maximum Stress across the MOSFET; VDCmax = Maximum Voltage across the Capacitor; VR = Reflected flyback voltage at the primary side; VS = Voltage spike produced by the primary side of the transformer due to leakage inductance. Usually, spike voltage is taken as 20% to 30% of maximum stress across MOSFET.
Solar photovoltaic based dynamic voltage restorer with DC-DC boost converter for mitigating power quality issues in single phase grid
Published in Energy Sources, Part A: Recovery, Utilization, and Environmental Effects, 2022
Suresh Kalichikadu Paramasivam, Senthil Kumar Ramu, Senthilkumar Mani, Suresh Muthusamy, Suma Christal Mary Sundararajan, Hitesh Panchal, Kishor kumar Sadasivuni
The proposed converter topology provides high DC-DC boosting conversion gain to PV system voltage, VPV with a minimum number of active state switches, S, and lower value of duty cycle ratio. In the proposed new DC-DC boost converter consisting of three winding coupled inductor (3WCI) with winding turns ratio as n1, n2, and n3 connected with PV array, a power switch, leakage inductance connected at DC-DC converter input side, and 1Ф – H bridge voltage source inverter. The more gain conversion is boosted due to the combination of coupled inductor arrangement and normal buck-boost basic converter principle. The voltage spike may be caused due to the leakage inductance connected at the input side of the converter. To overcome this issue, a clamping type passive circuit with diode D1, and capacitor C1 is connected to achieve more efficiency as well as reduce voltage stress by reducing voltage spike. The induced voltage at the inductance in the DC-DC converter release the stored energy to the VSI inverter. Six different modes of operation of the PV-TDVR are described below.