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Introduction
Published in Vlad P. Shmerko, Svetlana N. Yanushkevich, Sergey Edward Lyshevski, Computer Arithmetics for Nanoelectronics, 2018
Vlad P. Shmerko, Svetlana N. Yanushkevich, Sergey Edward Lyshevski
A field-programmable gate array is a semiconductor device containing programmable logic components called "logic blocks," and programmable interconnects. Logic blocks can be programmed to perform the function of basic logic gates such as AND and EXOR, or more complex combinational functions such as decoders or simple mathematical functions. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memories. A hierarchy of programmable interconnects allows logic blocks to be interconnected as needed by the designer. Logic blocks and interconnects can be programmed by the customer/designer, after the FPGA is manufactured, to implement any logical function (hence the name "field-programmable").
Ideas for Improving the Digital Design Lab
Published in IETE Journal of Education, 2023
Typical experiments in combinational design in a “Digital Lab” include (i) Designing and demonstrating the working of arithmetic circuits such as full-adder or ripple-carry adder (ii) Designing simple random logic from a specification e.g. a 3-input majority voter or code converter. The student is expected to be familiar with Karnaugh maps [10] and the process of deriving the minimum sum-of-products expression from a Karnaugh map. The student should know the concept of universal logic blocks which can be used to build any digital logic circuit. NAND gates, NOR gates and two- to −1 multiplexers are examples of universal logic blocks. Combination of XOR and AND gates can also be used to realize any digital logic. Familiarity with some combinational blocks such as decoders, encoders, multiplexers, demultiplexers, ALU, etc. is also useful. Circuits from the TTL logic family are used in most labs. The student must know the concepts of active high and active low inputs, the high impedance state, the don't care input, and unknown output. In a TTL circuit, leaving an input unconnected would be tantamount to connecting the input to a logic 1.