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Low-Power RF Digital PLLs with Direct Carrier Modulation
Published in Christopher Siu, Krzysztof Iniewski, IoT and Low-Power Wireless, 2018
Salvatore Levantino, Carlo Samori
As we have already mentioned, one potential problem in a DPLL-based wideband phase modulator that may compromise modulation accuracy and degrade the EVM of the constellation is DCO non-linearity. To analyse this issue, we have to take into account that an additional constraint in DPLLs is the so-called frequency granularity induced by the finite number of bits of the DCO [45], which introduces quantisation noise in the loop. For this reason, the LSB of the DCO has to be sufficiently small to add insignificant truncation error. In practical systems, DCO resolution should be in the order of 10 kHz/bit, which can be achieved in modern CMOS processes. So, this is typically not a serious issue when the DPLL is employed as a standard frequency synthesiser. However, when the DPLL is used as a wideband modulator, the largest variation of the output frequency has to reach ±fref/2, to produce a phase variation up to ±π in one reference clock. Therefore, the DCO full-scale range should exceed a 12-bit plus margin (if we assume, for instance, fref equal to 40 MHz). Of course, it is not easy to guarantee a linear tuning characteristic of the DCO over such a wide dynamic range.
Digital RF Processor (DRP™)
Published in Krzysztof Iniewski, Wireless Technologies, 2017
The digitally controlled oscillator (DCO) [20,21], which deliberately avoids any analog tuning controls, splits its tuning capacitance into a large number of tiny capacitors, whose states are selected digitally. As shown in Figure 10.8, this is in contrast with a conventional voltage-controlled oscillator (VCO) method in which the frequency tuning is achieved in analog fashion through a linear capacitance change of a single large varactor. The fully digital control allows for the loop control circuitry to be implemented in a fully digital manner as first proposed in Ref. 22 and then demonstrated as a novel phase-domain all-digital PLL [11]. The advanced lithography allows creation of extremely fine variable capacitors (varactors)—about 40 aF (attofarads) of capacitance per step, which equates to the control of only 250 electrons entering or leaving the resonating LC tank. Despite the small capacitance step, the resulting frequency step at the 2 GHz RF output is 10–20 kHz, which is too coarse for wireless applications. Thus, the fast switching capability of the transistors is utilized by performing high-speed 225–900 MHz ΣΔ dithering of the 250 electrons in the finest varactors. The duty cycle of the high/low capacitive states establishes the time-averaged resonating frequency resolution, now better than 1 kHz. The finest varactors are realized as either p-poly/n-well (130 nm CMOS) or n-poly/n-well (90 nm CMOS) MOS capacitor (MOSCAP) devices.
Frequency Synthesis and Clock Recovery
Published in Bang-Sup Song, Micro CMOS Design, 2017
The VCO together with an input DAC is often called a digitally controlled oscillator (DCO). The advantage of digital loop filtering is the flexibility and accuracy that digital signal processing (DSP) provides. The digital loop filter can easily replace large loop-filter capacitors with small digital circuitry. TDC works as a phase detector and feeds the digital phase error back to the digital loop filter. However, both TDC and DAC have finite quantization noises, which should be lower than the VCO phase noise. The simplest TDC is to latch the input reference with polyphase VCO outputs, which creates a snapshot of the zero-crossing point. The location of the zero-crossing point becomes the thermometer-coded digital output like the time-domain analog-to-digital converter (ADC) discussed in Chapter 5.
Digitally tunable active inductor for RF-DCO applications
Published in International Journal of Electronics Letters, 2020
Innovation in the wireless domain has been closely associated with corresponding improvements in digital technology (Machado & Wyglinski, 2015). To reduce the traffic in a mobile network and facilitate roaming across the countries each area is allotted with a standard band (Rais-Zadeh, Fox, Wentzloff, & Gianchandani, 2015). A single device must cover the wide spectrum, so the RF frequency synthesiser in the transceiver architecture is expected to operate over a wide frequency band. They need to generate several frequencies of oscillation for signal up/down conversion (Liou, Chen, Yeh, & Ho, 2007). Controlled oscillators, the heart of frequency synthesiser, tunes to oscillating frequency based on the applied control parameter which may be either analogue voltage/current or digital word. A digitally controlled oscillator (DCO) offers better performance, noise reduction, able to work over the entire operating range, and is also expected to operate at a higher frequency with portability, programmability, and integrate-ability (Haddad et al., 2014). Most of the inductor-capacitor (LC) tank-based DCOs uses passive inductors coupled with digital tunable capacitance (DTC) bank to vary the frequency of oscillation. The tunable capacitors in deep submicron designs are less linear and can only offer a narrow tuning range (Debroucke et al., 2011).