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Introduction
Published in Jun Ohta, Smart CMOS Image Sensors and Applications, 2020
There are three main categories of smart CMOS image sensors, namely pixel-level processing, chip-level processing or camera-on-a-chip, and column-level processing as shown in Fig. 1.3. The first category, i.e., the pixel-parallel processing, is also called the vision chip. In the 1980s, C. Mead and coworkers at Caltech* proposed and demonstrated vision chips or silicon retina [44]. A silicon retina mimics the human visual processing system with a massively parallel-processing capability using the Si LSI technology. The circuits work in the sub-threshold region, as discussed in Appendix F, to achieve low power consumption. In addition, the circuits automatically solve a given problem by using convergence in 2D resistive networks [44]. They frequently use photo-transistors (PTrs) as photo-detectors owing to the gain of PTrs. Since the 1980s, considerable work has been done on developing vision chips and similar devices, as reviewed by Koch and Liu [45], and A. Moini [1]. Massively parallel processing in the focal plane is very attractive and has been the subject of much research in fields, such as programmable artificial retinas [46]. Some applications have been commercialized, such as two-layered resistive networks using 3T-APS by T. Yagi, S. Kameda, and coworkers at Osaka University [47, 48].
Introduction
Published in Jun Ohta, Smart CMOS Image Sensors and Applications, 2017
There are three main categories for smart CMOS image sensors, as shown in Fig. 1.3: pixel-level processing, chip-level processing or camera-on-a-chip, and column-level processing. The first category is vision chips or pixel-parallel processing. In the 1980s, C. Mead and coworkers at Caltech* proposed and demonstrated vision chips or silicon retina [42]. A silicon retina mimics the human visual processing system with massively parallel-processing capability using Si LSI technology. The circuits work in the subthreshold region, as discussed in Appendix E, in order to achieve low power consumption. In addition, the circuits automatically execute to solve a given problem by using convergence in two-dimensional resistive networks, as described in Section 3.3.3. They frequently use phototransistors (PTrs) as photodetectors due to the gain of PTrs. Since the 1980s, considerable work has been done on developing visions chips and similar devices, as reviewed by Koch and Liu [43], and A. Moini [1]. Massively parallel processing in the focal plane is very attractive and has been the subject of much research into fields such as programmable artificial retinas [44]. Some applications have been commercialized, such as two-layered resistive networks using 3T-APS by T. Yagi, S. Kameda, and co-workers at Osaka Univ. [45,46].
Journey of Visual Prosthesis with Progressive Development of Electrode Design Techniques and Experience with CMOS Image Sensors: A Review
Published in IETE Journal of Research, 2018
Subretinal implantation of artificial silicon retina showed no signs of implant rejection, infection, inflammation, erosion, neovascularization, retinal detachment, or migration. Significant improvement was observed specially on the retinal area which was distance apart from implant showing the kind of neurotrophic rescue. Color, contrast, brightness, resolution were found to be improved [75].