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Published in Philip A. Laplante, Comprehensive Dictionary of Electrical Engineering, 2018
flag (1) a bit used to set or reset some condition or state in assembly language or machine language. For instance, the inheritance flag, and the interrupt flag. As an example, each maskable interrupt is enabled and disabled by a local mask bit. An interrupt is enabled when its local mask bit is set. When an interrupt's trigger event occurs, the processor sets the interrupt's flag bit. (2) a variable that is set to a prescribed state, often "true" or "false," based on the results of a process or the occurrence of a specified condition. Same as indicator. flag register (1) a register that holds a special type of flag. (2) a CPU register that holds the control and status bits for the processor. Typically, bits in the flag register indicate whether a numeric carry or overflow has occurred, as well as the masking of interrupts and other exception conditions. flash EEPROM See flash memory.
Instruments for Data Acquisition
Published in Felix Alberto Farret, Marcelo Godoy Simões, Danilo Iglesias Brandão, Electronic Instrumentation for Distributed Generation and Power Processes, 2017
Felix Alberto Farret, Marcelo Godoy Simões, Danilo Iglesias Brandão
The control of the data bus has more or less the same function as a traffic guard controlling the automobile flow (data) at a crossing of several roads. It is used to guide the data and to establish the instant these data can be transferred from CPU to memory or any other peripherals, as we see below. The program control serves to destine the data and to establish the instant these data should be transferred between the registers and accumulator, and it helps in the execution of operations realized by ALU. The flags serve to indicate programming events such as if the sign resulting from an operation is positive or negative; if a value is larger, smaller, or equal to other in a logical comparison; and if it should have an interruption in the normal processing to assist an external call from CPU determined by some external event. The stack pointer indicates the program memory address where the instruction is contained to say what should be accomplished according to the instruction contained in the program memory in that indicated position. The registers are the immediate memory used by CPU to execute internal operations and to establish the results of logical comparisons.
C Programming
Published in Paul W. Ross, The Handbook of Software for Engineers and Scientists, 2018
C type modifiers can be used to adapt types in some useful ways. The “typedef’ keyword is used to create a new name for an existing type. The first example in Figure 13.17 allows the name “boolean” to be an alias for int. (C has no boolean type.) Then the variable “flag” is declared of type boolean. This variable is actually an int, but it is clear that the programmer intends to use this to store true and false values. The second typedef example creates a new name for this structure. This new name is then used to declare the variable largeRectangle.
An effective memetic algorithm for the distributed flowshop scheduling problem with an assemble machine
Published in International Journal of Production Research, 2023
Ying-Ying Huang, Quan-Ke Pan, Liang Gao
We present a new method for updating the population, which is shown in Algorithm 4. First, determine whether the optimal solution obtained by the inner iterations is better than the current optimal solution . If so, the current population is replaced by the offspring set . In this case, the value of the flag bit ‘improve’ is set as ‘true’. Otherwise, if the ‘flag’ is ‘true’, that is, there is no individual identical to in , the worst individual of is removed and is introduced. This update method does not take up much elapsed CPU time. From the global point of view, the substitution of the current population with the offspring set in lines 2–4 is conducive to the optimisation of the population quality. At the same time, from a local point of view, lines 5–11 make the quality of solutions better and better with subtle changes.
Design and Implementation of a Ground Power Unit Based on the Fault-Tolerant Inverter
Published in Electric Power Components and Systems, 2022
Hasan Abbaspour, Hossein Madadi Kojabadi, Mohammad Farhadi-Kangarlu
According to Table 2, the analysis of these errors is used to identify which power switch (or switches) of the inverter has encountered a fault. A 3-bit word flag (flag a, flag b, and flag c) as given in Table 2, is used to indicate the location of the fault in the inverter leg. The flowchart for proposed fault detection in Figure 6 is based on the analysis of the voltage error. In normal operation modes, the inverter output voltage value does not change and the voltage error is 0. As soon as a fault occurs in the inverter, the value of the output voltage changes. This value is measured with a voltage divider, and therefore additional sensors are not required. The measured output voltages of inverter are compared with the reference values, and the difference between the two voltages indicate the existence of a fault. The fault diagnosis is accomplished according to the flowchart of Figure 6, and based on the following procedures:
Synthesis of programmable biological central processing system
Published in Journal of the Chinese Institute of Engineers, 2021
Wei-Xian Li, Jiangfeng Cheng, Chun-Liang Lin, Chia-Feng Juang
A biological status register, or condition code register, is a collection of status flag bits for the Bio-CPU. The decision function indicates a specific condition that must be fulfilled when the bit of the status register is processed. The instruction address will then be JUMP with a specific instruction address. The condition is determined by referencing the Bio-ALU output state. One condition is that when the protein state in the Bio-ALU causes the Carry-output to be high, the system must have a CARRY status. Another condition is that when all output states in the Bio-ALU are at the low state, the system must have the condition of ZERO. We coordinate the enable commands and the biological registers to retain bit status, which can be utilized to trigger the opcodes of JUMPC, JUMPNC, JUMPZ, and JUMPNZ.