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A Taxonomy of Bitcoin Security Issues and Defense Mechanisms
Published in Brij B. Gupta, Michael Sheng, Machine Learning for Computer and Cyber Security, 2019
Hardware Security Module (HSM) is a tamper-resistant device which is used to store, process and manage the cryptographic keys [59]. Its main responsibility is to protect these stored keys. The processing of keys involves encryption, decryption, authentication and generation of digital signatures. They are customizable according to the application’s requirement. Nowadays, there is a provision of crypto hypervisors which provide on-demand cryptographic services, using cloud environment.
Machine Learning in Hardware Security of IoT Nodes
Published in Sandeep Saini, Kusum Lata, G.R. Sinha, VLSI and Hardware Implementations Using Modern Machine Learning Methods, 2021
In semiconductor technology, there has been enormous progress, which has brought about a great amount of participation in the design stage and development stages of integrated circuits (ICs) [1]. The design complication of the circuits increasing continuously was that they required a specialized team worldwide to work on the complexity of the design to increase the manufacturability and efficiency of the ICs. However, the difficulty lies in the security of the circuits from an adversary at any stage of the manufacturing process inserting a malicious circuit [2]. In the design-fabrication process of ICs, various stages could be exploited by the adversary, such as attacks to perform an unwanted function in a circuit, called a hardware Trojan (HT), which impact the trustworthiness and security of the device. HT circuits are defined as an extra circuit present in a main circuit that consists of payload logic and trigger logic, as shown in Figure 14.1. The payload logic gets activated by a trigger signal that is sent by trigger logic from an adversary to perform an unwanted function in the main part of the circuit [3]. The attack may cause damage to hardware by means of change in the functionality of the device, obstruction caused during the execution, betrayal of information stored in the hardware, etc. These threats cause severe concern in various critical applications such as medical equipment, mobile communications, reactors, defense-based strategies like aerospace companies, devices connected to Internet of Things (IoTs), etc. [4]. HTs are evolving constantly beyond chips to layers of the design, circuit components, and even devices that lead to security issues in the entire hardware ecosystem. Thus, there is a need for security to protect hardware. Rather than software protection, the physical device is protected from hardware vulnerability by using hardware security. This hardware security adds a supplementary layer of security for an important hardware system [5].
Survey on the benefits of using memristors for PUFs
Published in International Journal of Parallel, Emergent and Distributed Systems, 2022
Muayad J. Aljafar, John M. Acken
Hardware security is an important area of research and aims at mitigating piracy, counterfeiting, and side-channel attacks [41]. PUF is one example of hardware security, which has been receiving increasing attention after emerging technologies such as memristors [42]. The feasibility and quality of memristor-based PUF (and other Non-Volatile Memory-based PUFs) were studied [43]. Examples of memristor-based PUFs in the literature are [38, 39, 41, 44–77], where the individual papers are discussed later in this survey. Table 1 summarizes PUF examples in the literature and shows which paper is discussed in which section. In addition, there are surveys, chapter books, tutorials based on NVM PUF circuits (including memristor PUFs), and patents [42, 78–87]. Most of these circuits were evaluated by simulations using memristor models [20, 88–98], whereas few other circuits were fabricated [1–6, 50, 69]. There are several statistical metrics such as uniqueness, uniformity, and bit-aliasing used for performance evaluations. These metrics and some other popular terms, which have been used in the memristor PUF literature are summarized in Table 2.