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Published in John D. Cressler, Circuits and Applications Using Silicon Heterostructure Devices, 2018
Lawrence E. Larson, Donald Y.C. Lie
However, although it is actively researched, the direct conversion receiver has not gained completely widespread acceptance to date, especially in high-performance wireless receivers, due to its intrinsic sensitivity to dc offset problems, even-order harmonics of the input signal that interfere with the desired signal, and local-oscillator leakage problems back to the antenna. These issues are all actively pursued by a variety of worldwide research groups, and it is anticipated that they will gradually become solved with further design maturity. The LO feedthrough problem has been addressed through the use of subharmonic mixer approaches—a technique borrowed from millimeter-wave radio astronomy—where the mixer is driven at half the desired frequency [8]. This reduces the problem of LO feedthrough and frequency “pulling” of the local oscillator at the expense of a higher local oscillator drive power.
Design of 0.13 µm low power CMOS subharmonic mixer for DCR applications
Published in International Journal of Electronics Letters, 2021
S Manjula, D Selvathi, M Suganthy, P Anandan
Recently, wireless sensor networks have received wide attention in several applications such as healthcare and military applications. As the scaling down of CMOS technology continues, RF CMOS circuits can be integrated and operated for wireless applications (Steyaert et al., 1996). For 2.4 GHz applications, the radio requency integrated circuit (RFIC) requires long lifetime of battery with low cost solutions. Among the various possible architectures of receiver, direct conversion receiver (DCR) is suitable for low power, less complexity, low cost and on chip integration (Cho et al., 1999). However, DC offset, I/Q mismatch, LO leakage, flicker noise and even order distortion are the drawbacks of DCR (Abidi, 1995; Razavi, 1997). For DCR, mixer plays an important role to avoid these drawbacks.
Reconfigurable radio receiver with fractional sample rate converter and multi-rate ADC based on LO-derived sampling clock
Published in International Journal of Electronics, 2018
Sungkyung Park, Chester Sungchung Park
The analogue-to-digital converter (ADC) lies in one of the core parts of the overall receive chain of the radio since the ADC is brought nearer to the receive antenna, more portions of the receiver are to be implemented in the digital domain. The RF front-end circuitry (and possibly the baseband chain composed of programmable-gain amplifiers and analogue filters) for the widely accepted direct conversion receiver may be based either on the traditional low-noise amplifier and downconverting analogue mixer combination or alternatively on the transconductance amplifier and direct RF sampling mixer for RF processing in the discrete-time domain. The latter approach is a recent one and a representative implementation is explained in Abidi (2007) and Muhammad et al. (2006), where a rate change filter is used after the ADC to accommodate multiple RF standards in the baseband.