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Current Steering Digital-to-Analog Converters
Published in Krzysztof Iniewski, Circuits at the Nanoscale, 2018
Real-world analog signals such as temperature, pressure, sound, or images are routinely converted to a digital representation that can be easily processed in modern digital systems. In many systems, this digital information must be converted back to an analog form to perform some real-world function. The circuits that perform this step are digital-to-analog converters (DACs), and their outputs are used to drive a variety of devices. Loudspeakers, video displays, motors, mechanical servos, radiofrequency (RF) transmitters, and temperature controls are just a few diverse examples. DACs are often incorporated into digital systems in which real-world signals are digitized by analog-to-digital converters (ADCs), processed, and then converted back to analog by DACs. In these systems, the performance required of the DACs will be influenced by the capabilities and requirements of the other components in the system.
Data Converters
Published in Wai-Kai Chen, Analog and VLSI Circuits, 2018
Many circuit techniques are used to implement DACs, but a few popular techniques used widely today are of the parallel type, in which all bits change simultaneously upon applying an input code word. Serial DACs, on the other hand, produce an analog output only after receiving all digital input data in a sequential form. When DACs are used as stand-alone devices, their output transient behavior limited by glitch, slew rate, word clock jitter, settling, etc. are of paramount importance, but are used as subblocks of ADCs, DACs need only to settle within a given time interval. In stand-alone DAC applications, the digital input word made of N-bits should be synchronously applied to the DAC with a precise timing accuracy. Thus, the input data latches are used to hold the digital input during the conversion. The output analog sample-and-hold (S/H), usually called deglitcher, is often used for the better transient performance of a DAC. The three most popular architectures in integrated circuits are DACs using a resistor string, ratioed current sources, and a capacitor array. The current-ratioed DAC finds the greatest application as a standalone DAC, while the resistor-string and capacitor-array DACs are used mainly as ADC subblocks.
Nyquist Digital-to-Analog Converters
Published in Tertulien Ndjountche, CMOS Analog Integrated Circuits, 2017
Ideally, signals from dc up to the Nyquist frequency, which is defined as the half of the DAC sampling frequency, can be generated by a converter. In practice, in addition to the increased difficulty to meet the specifications of the reconstruction filter, the converter performance tends to degrade significantly when approaching the Nyquist frequency. Nyquist DACs are based on various architectures (binary-weighted, thermometer-coded, and segmented structures) and conversion techniques such as voltage scaling, current scaling, charge scaling or redistribution, and hybrid methods. In each of these types of DACs, the conversion is achieved by summing all the output signal contributions associated with the different bits of the input digital code. The resolution of high-speed DACs based on each of the aforementioned techniques is generally limited by the circuit size and complexity. One approach adopted to reduce the number of elements (transistors, resistors, and capacitors) is to use a segmented DAC. In a segmented converter, a first stage decodes the most significant bit (MSB) part of the input digital code and a second stage is driven by the remaining least significant bits (LSBs). A further issue with high-resolution DACs is that the linearity and monotonicity of the conversion characteristic is limited by component matching. The effect of mismatches, which are generally caused by IC process gradients, can be alleviated either by adding a calibration stage to the DAC or by laser trimming components to adjust their values after wafer fabrication.
Improved performance 6-bit 3.5 GS/s unary CS-DAC using glitch reduction
Published in International Journal of Electronics Letters, 2020
High-speed and low-power current-steering digital to analogue converters play a crucial role, and they are fundamental component of modern day audio, video and communication integrated circuits. High-resolution current steering digital to analogue converters (DACs) are linear, high-speed and low power devices with gigahertz sampling rates which make it appropriate for such applications. These DACs are made up of an array of current cells that can drive a resistor to obtain voltage at the output which is proportional to the digital inputs. To design the current cell array, three different architectures are used, namely: unary, binary and segmented where unary is used for MSBs and binary weighted is used for least significant bit (LSB)s in Bosch, Borremans, Steyaert, & Sansen (2001). As high-resolution binary weighted current arrays are big in size consumes more die area and also very complex, therefore this brief uses unary or thermometer based current steering DACs to design 6-bit 3.5 GS/s DAC. Decoding logic of unary current steering DACs is very large and complex but as we design 6-bit DAC henceforth it gives advantage of linearity, smaller glitch and small static errors such as differential non-linearity (DNL) and integral non-linearity (INL). Conventional current steering DAC is shown in Figure 1.
Radar wideband digital beamforming based on time delay and phase compensation
Published in International Journal of Electronics, 2018
To show a reduction in the design complexity, the designed system (shown in Figure 1) uses time division duplexing for transmitting and receiving, which means the transmitting and receiving operations are accomplished at different times by a single-pole double-throw switch. As described in Fu, Jiang, Su, Qian and Gao (2017), a wideband digital transmitting beamformer was constructed as a combination of direct digital synthesisers (DDSs) and digital time delay filters. Wideband DDSs and digital time delay filters are used to produce wideband IF LFM signals and adjust the time delay according to the scanning angle, respectively. Due to the time delay of wideband IF signals at the subarray level, frequency shifts and phase compensations are implemented in narrowband DDSs so that the emission signals are all in phase in the direction of interest. Digital-to-analogue converters (DACs) are used to convert digital waveforms into analogue signals. The radio frequency (RF) signals are generated by multiple upconversion stages and then amplified and radiated into space by array antennas.