China
Africa
Explore chapters and articles related to this topic
Introduction of Advanced Analog Circuit
Published in Arjuna Marzuki, CMOS Analog and Mixed-Signal Circuit Design, 2020
The switching frequency is dependent on the input voltage and load current. A higher switching frequency lowers the efficiency due to the increased switching losses [12]. Input current magnitude can be controlled by the switching frequency. This can be utilized for controlling the output voltage with the switching frequency. It should be noted that the increasing switching frequency reduces output voltage and vice versa [13]. The increase of switching frequency also increases the energy associated with capacitive-coupled displacement, but high-frequency switching results in smaller off-chip reactive components, which can be used, leading to more savings on the bill-of-material. The bill-of-material can be even further reduced if off-chip reactive components are eventually integrated. The resistive losses dominate at a low frequency, while capacitive losses are dominant at high switching frequencies [14].
Power Device Platforms
Published in John D. Cressler, H. Alan Mantooth, Extreme Environment Electronics, 2017
At first, SiC experienced issues with its native gate oxide as mentioned in Chapter 20, but these have largely been overcome. However, it is still not considered the best device for extremely high temperatures (>225°C) even though it has been demonstrated above 225°C. The SiC MOSFET possesses faster switching characteristics than its silicon counterpart for the same reasons demonstrated in the previous section for unipolar Schottky diodes—less stored charge. This higher switching frequency is desirable because it means that the energy storage elements that are a part of power electronic circuits can have smaller values for the same performance. Smaller valued capacitors and inductors means that they are also physically smaller; so much so that typical system-level volumetric reductions are on the order of 5–10 times. The on-state resistance is lower for SiC MOSFETs as well, which again means lower conduction losses. When combined with lower switching losses, even at higher switching frequencies, it is easy to conclude that power converters made with SiC MOSFETs will be more efficient than those with silicon. Figure 22.8 shows the theoretical limits and the current state of the art of MOSFET technologies in terms of specific on-state resistance versus breakdown voltage.
Introduction to Reconfigurable Computing Systems
Published in Lev Kirischian, Reconfigurable Computing Systems Engineering, 2017
Technological reasons for performance constraints are as follows: (1) limited switching frequency of transistors that a certain technology can provide and (2) limited speed of signal propagation in a semiconductor. The switching frequency of transistors directly depends on manufacturing technology. If the technology provides smaller linear dimensions for transistors, the internal capacitance of these transistors is reduced and, therefore, allows higher switching frequency. However, the linear dimensions of transistors are restricted by both physical reasons and limitations in the manufacturing process. Therefore, switching frequency and the associated clock frequency have their physical limit. At the same time, the signal propagation speed also depends on many factors (e.g., type of semiconductor, impedance of routing). In any case, this speed can never reach the speed of light. In addition to that, the available power (consumption and dissipation) provided by a given technology is also a great limiting factor for performance acceleration.
Design and Implementation of Three Phase TCHB-Based DVR
Published in IETE Journal of Research, 2023
Rajshri Satputaley, V. B. Borghate, Anurag Khergade, Ashwin Dhabale, S. K. Patro
The comparison of five-level TCHB inverter with respect to the number of components required with frequently used NPC, CHB, and COEW topologies is given in Table 5. The inverter used in the developed DVR topology requires only five switches to generate five level output in single phase. The developed topology requires 30% lower number of components when compared with other MLI topologies. Out of five switches used in TCHB, two switches and are operated at the fundamental frequency of 50 Hz, and the other three switches are operating at the carrier switching frequency. The high switching frequency switches are more prone to damage, this decreases the reliability of the circuit. In CHB, COEW, and NPC topology all switches are operated at the carrier frequency. The use of NPC topology at more than three level is limited because of the requirement of a large number of clamping diodes, causing packaging constraint [9]. The NPC topology requires a single DC source at the DC link, but it requires four DC link capacitors for five level operation. Also, the FC topology is not used for higher level because of the requirement of a large number of flying capacitors which is causing capacitor balancing problem [10].
Bi-directional DC/DC Converters Used in Interfacing ESSs for RESs and EVs: A Review
Published in IETE Technical Review, 2023
Om Prakash Jaga, Ritesh Gupta, Balaram Jena, Sumit GhatakChoudhuri
Designing an efficient DC/DC converter has been challenging and depends on several factors that need to be considered. Higher switching frequency, on the one hand, is counted among desirable parameters as it helps to minimise the size of passive elements. On the other hand, it increases switching losses, leading to increased heat dissipation and a larger heat sink requirement. The selection of switching frequency (fs) should be a practical compromise between component size and efficiency. Inductor wire must be rated at Root Mean Square (RMS) current and the magnetic core should not saturate for peak current value. Capacitor selection must depend on the voltage ripple limit to withstand rated voltage and should be capable of carrying the required RMS current. Active switch/diode configuration must be meticulously chosen so that the resultant topology can withstand maximum voltage stress during turn-off and maximum current stress during turn-on through the switch. The design engineer, therefore, should consider parasitic effects due to passive elements, voltage and current stress on active switches, voltage and current ripple factors, device power rating, switch utilisation factor, continuous/discontinuous mode of operation and the turns ratio of the high-frequency transformer. The switching device's power rating also helps estimate losses and system cooling requirements, leading to a pre-evaluation of the approximate cost.
Analysis of Cascaded Multilevel Inverter with a Reduced Number of Switches for Reduction of Total Harmonic Distortion
Published in IETE Journal of Research, 2023
Kola Muralikumar, P Ponnambalam
The advantages of cascaded multilevel inverter are compared to [8]. The modified cascaded multilevel inverter is used in fewer components. The price, weight and complexity of the system are less than other topologies. This cascaded topology results total harmonic distortion that becomes low in the output waveform without using any filter circuit. It can operate at fundamental switching frequencies: higher switching frequency and lower switching frequency. It should be noted that the lower switching frequency means lower switching loss and higher efficiency are achieved.