Re-order buffer

Re-order buffer

A re-order buffer is a type of buffer used to store the results of instructions in a computer's architecture. It is designed to handle situations where instructions are executed out of order, allowing the results to be stored and then passed to the register file once the instruction has completed. The re-order buffer uses the destination register supplied by the instruction queue's entry to ensure that the correct result is passed to the correct register.From: Digital Systems and Applications [2019], A programmable ternary CPU using hybrid CMOS/memristor circuits [2018]

RISC, Video and Media DSPs

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Published in Keshab K. Parhi, Takao Nishitani, Digital Signal Processing for Multimedia Systems, 2018

Ichiro Kuroda

Fig. 10.1 shows an example of an out-of-order superscalar microprocessor [10]. Implementation of out-of-order control requires a lot of additional hardware functional units such as a reorder buffer which controls the instruction issue and completion, a reservation station which re-orders the actual instruction issues for execution units and renamed register files as well as control circuits for them. They consume a large part of silicon area as well as power dissipation.

A programmable ternary CPU using hybrid CMOS/memristor circuits

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Published in International Journal of Parallel, Emergent and Distributed Systems, 2018

Daniel Wust, Dietmar Fey, Johannes Knödtel

To guarantee in-order commits, the reorder buffer checks the execution status of the head entry in the instruction queue. In case the status flag is set to done, the reorder buffer passes the computed result to the register file using the destination register supplied by the instruction queue’s entry. To avoid Write after write hazards the destination registers availability is only set to available if the functional unit computing the destination register equals the current functional unit.

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A programmable ternary CPU using hybrid CMOS/memristor circuits