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Direct Conversion Architectures for SiGe Radios
Published in John D. Cressler, Circuits and Applications Using Silicon Heterostructure Devices, 2018
Sudipto Chakraborty, Joy Laskar
Analogous to the issues present the transmitter, nonidealities in the direct conversion receiver lead to impairments around the zero frequency (or DC). SNR degradation happens in this case due to DC offset and 1/f noise from the devices. DC offset can be divided into two categories: (a) static DC offset, which results from the mismatches in the circuit components, such as transistors, resistors, etc., (b) dynamic DC offset, which is essentially caused by the finite reverse isolation present in a down conversion mixer, caused by the self-mixing, or any other mechanism (such as substrate leakage), leading to the self-mixing phenomenon. A classic example of dynamic DC offset is the DC offset variation effect in the receiver when a wireless terminal experiences different signal reflections from surrounding objects in the environment, and the degradations vary with time. Static DC offsets can be tuned out by some form of a calibration mechanism performed when the IC is powered up, but the dynamic DC offset needs time-dependent averaging and cancellation, which is usually performed at baseband. Due to this effect, in any successful prototype demonstrating direct conversion architecture, the LO frequency is different from the RF frequency to minimize the number of nodes operating at the RF frequency (hence leading to self-mixing). The order of LO frequency determines the frequency scheme. If the LO frequency is n times the RF frequency, the architecture is referred to as “nX” architecture.
Reconfigurable radio receiver with fractional sample rate converter and multi-rate ADC based on LO-derived sampling clock
Published in International Journal of Electronics, 2018
Sungkyung Park, Chester Sungchung Park
The analogue-to-digital converter (ADC) lies in one of the core parts of the overall receive chain of the radio since the ADC is brought nearer to the receive antenna, more portions of the receiver are to be implemented in the digital domain. The RF front-end circuitry (and possibly the baseband chain composed of programmable-gain amplifiers and analogue filters) for the widely accepted direct conversion receiver may be based either on the traditional low-noise amplifier and downconverting analogue mixer combination or alternatively on the transconductance amplifier and direct RF sampling mixer for RF processing in the discrete-time domain. The latter approach is a recent one and a representative implementation is explained in Abidi (2007) and Muhammad et al. (2006), where a rate change filter is used after the ADC to accommodate multiple RF standards in the baseband.