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Distributed Genetic Algorithms for Design Optimization
Published in Hojjat Adeli, Sanjay Kumar, Distributed Computer-Aided Engineering, 2020
Speedup is defined as the ratio of time taken to execute a task on p processors to the time taken on a single processor with no communication or synchronization primitives inserted in it. Efficiency is defined as speedup divided by number of processors. Deviation from ideal (linear) speedup (and hence, efficiency) is caused mainly by two factors. First, there is a communication cost associated with every fitness function evaluation tc (estimated by Eq. (4-16)). Second, population replication is performed sequentially by the master process. The ratio k1 =g/qt gives a measure of the sequential part of the algorithm. Assuming a worst case scenario in which all communications are sequential (due to the bus-like nature of the network), the total time required for the distributed GA presented in this chapter is estimated as () Tparp=tsqp+gs+qtcs
Applications of Parallel Processing in Structural Engineering
Published in Hojjat Adeli, Parallel Processing in Computational Mechanics, 2020
The idea behind parallel processing is that programs using N parallel processors should run much faster than otherwise identical programs using only one processor. Because there are many stratagems to solve a problem on concurrent machines, specific criteria should be established to evaluate performance. Universally speedup is the accepted criterion to assess performance. The speedup of a parallel algorithm is defined as the ratio of the execution time of the original sequential algorithm using one processor to the execution time of the parallel algorithm using N processors. Ideally the speedup should approach N, although experience and theory show that the actual speedup is often much smaller. Efficiency is defined as the ratio of speedup to N, which indicates the effectiveness of the processors being used. Factors that affect the speedup of a parallel stratagem include the complexity of the computations, load balancing, the complexity of communications, the relative cost of communications over computations, and the granularity and heterogeneity of the stratagem. For the purpose of this chapter speedup and efficiency are estimated in terms of problem and machine parameters.
Integration of Graphics Processing Cores with Microprocessors
Published in Tomasz Wojcicki, Krzysztof Iniewski, VLSI: Circuits for Emerging Applications, 2017
Deepak C. Sekar, Chinnakrishnan Ballapuram
Compute Unified Device Architecture (CUDA) (Nvidia Corporation, Santa Clara, CA): In early 2000, a few computer research labs built GPGPU application programming interfaces (APIs) on top of graphics APIs to enable and support GPGPU programming, and two such languages were BrookGPU and Lib Sh. CUDA is Nvidia’s approach to the GPGPU programming problem that lets programmers easily off-load data processing to GPUs [5]. The language is C with Nvidia extensions that provide interfaces to allocate GPU memory, copy data from host to device memory and back, and declare global and shared scope variables, to name a few. First the data has to be copied to the GPU memory before GPU computation is invoked by the CPU, and the results are copied back to main memory after GPU computation. The speedup is based on how efficient the programmers code the parallelism. The CUDA architecture has evolved and it currently supports many high level languages and device-level APIs such as Open Computing Language (OpenCL) and DirectX (Microsoft, Redmond, Washington). The integration of CPU and GPU on the same die will help ease memory bandwidth constraints.
Development and Optimisation of a DNS Solver Using Open-source Library for High-performance Computing
Published in International Journal of Computational Fluid Dynamics, 2021
Hamid Hassan Khan, Syed Fahad Anwer, Nadeem Hasan, Sanjeev Sanghi
Speedup is defined as the ratio of the sequential computational time to the parallel computational time; and quantifies the solver scalability by measuring the time gain of the parallelisation. Figure 7(a) illustrates that the speedup trends increase linearly for the first processes; afterward, the speedup trend diverges from the ideal speedup. Indeed, the communication between the processors increases at a higher number of required processors, which leads to diverge the speedup trend. However, the computational time decreases with the increased number of processors, and the time to complete the simulation decreases correspondingly. The workload of the processor utilisation is measured through parallel efficiency. The parallel efficiency is defined in Equation(31) as the ratio of the achieved speedup to the ideal speedup. The efficiency displayed in Figure 7(b) declines steadily with an increase in the number of processors. As expected, the decline in efficiency is in analogy to the divergence of speedup with an increase in the processor, as shown in Figure 7. The deterioration of the speedup and efficiency is relevant because of the increase in communication time with the increase in the number of the processor, while the results ensure significant gain in computation time. The speedup and efficiency suggest that the parallel strategy used in the present solver is effective regardless of the increase in partition or processor.
Big data analytics for retail industry using MapReduce-Apriori framework
Published in Journal of Management Analytics, 2020
Neha Verma, Dheeraj Malhotra, Jatinder Singh
Speed-up as the name suggests, refers to the execution time comparison of the modified parallel algorithm with respect to the traditional sequential algorithm. The following equation defines Speed-up:Where PA – parallel algorithm SA – sequential algorithm k – Number of processors ST1 – time is taken by the original algorithm (sequential nature) STk – time is taken by a parallel algorithm with k processors
Fast simulation of dynamic heat transfer through building envelopes via parareal algorithms
Published in Science and Technology for the Built Environment, 2022
Qiongxiang Kong, Zhen Miao, Chunlei Yang, Zhendi Ma, Yaolin Jiang
Parallel speedup and parallel efficiency are widely used to evaluate the performance of the parallel algorithm. Parallel speedup is defined as the ratio of sequential computing time to the parallel computing time on multiple processors. Parallel efficiency is the ratio of the speedup to the number of computing processors involved correspondingly, which is a main measurement to evaluate the average processor utilization (Eager, Zahorjan, and Lazowska 1989).