China
Africa
Explore chapters and articles related to this topic
Implementation and defect analysis of QCA based reversible combinational circuit
Published in Alka Mahajan, Parul Patel, Priyanka Sharma, Technologies for Sustainable Development, 2020
Vaishali Dhare, Deeksha Agarwal
Since last five decades, the current silicon technology has made the Moore’s law existent and offered high device density, low power and high speed implementations. The increase in device density by the scaling of transistor cause the heating problems [1]. Today’s processors are designed using conventional (irreversible) logic circuits. In conventional logic circuits, the intermediate bits used to compute the final results are discarded unknowingly. This leads to energy dissipation which affects the speed and performance in the computing. The general processors dissipate more than 500 times the amount of heat, estimated by Landaeur [2] due to loss of 1 bit information. Thus, there is a great need of reversible logic circuits. In reversible computing bits are preserved and logical and physical reversibility guaranteed low energy dissipation. Hence, the processor with reversible logic will have less heating problem.
Introduction
Published in Vlad P. Shmerko, Svetlana N. Yanushkevich, Sergey Edward Lyshevski, Computer Arithmetics for Nanoelectronics, 2018
Vlad P. Shmerko, Svetlana N. Yanushkevich, Sergey Edward Lyshevski
Bennet pioneered logically reversible computations, leading to the widely known models for reversible computing that admit computations with energy recovery. Subsequently, Fredkin and Toffoli demonstrated logical gates that exhibit the same property. In contemporary logic computing, switching is based on nonrecovering modes of energy consumption. For example, loss of information for the two input AND gate is Hloss=Hout-Hin=1.189bit for the probability pi=0.25 of input pattern.
Fault tolerance and ultimate physical limits of nanocomputation
Published in David Crawley, Konstantin Nikolić, Michael Forshaw, 3D Nanoelectronic Computer Architecture and Implementation, 2020
A S Sadek, K Nikolić, M Forshaw
Having found the limits to speed, we can thus appreciate the assertion by Frank for the optimum architecture of a 3D computer [77]. If each mesh takes time t to perform some useful information processing and the interconnect signals between mesh elements have velocity υ, then the optimum distance to place each of the mesh elements apart is d = υt = υ/f. The very high limit to the frequency f of dynamical evolution means that the ultimate 3D computer is, in fact, a nanocomputer. Below a certain length scale, the speed of computation is increased even further by migrating to reversible computing.
A Novel Heuristic Method for Linear Nearest Neighbour Realization of Reversible Circuits
Published in IETE Journal of Research, 2022
Anirban Bhattacharjee, Chandan Bandyopadhyay, Hafizur Rahaman
A Boolean function satisfies the reversibility condition if the number of inputs and outputs becomes similar and permutes the input combination to generate the corresponding set of output patterns. More precisely, the mapping between the input and output combination should be bijective. In other words, any given input pattern can only be uniquely mapped to its corresponding output set and vice versa. This makes computation permissible from input to output and vice versa difficult in an irreversibility condition. Reversible computing makes the computational process invertible, while it is not possible in irreversible computing. Alternatively, reversible logic allows generating the previous state from the current state without losing information.