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Advanced Architecture Computers
Published in Hojjat Adeli, Supercomputing in Engineering Analysis, 2020
Concentrix, Alliant’s enhancement of Berkeley 4.3 UNIX with multiprocessor support. System V, Release 4 will be available in 1991. The FX/ RT Real-Time Executive is an option that co-resides with Concentrix and offers a real-time execution software environment for real-time simulation, data acquisition and control, and discrete/continuous event simulation requirements. The Informix relational database management system is available. The software on the FX/2800 series conforms with the PAX standard drawn up by Intel and Alliant for the software support of the i860 chip and supported by much of the industry. Graphics support includes PHIGS, PHIGS + , and Alliant’s VISEDGE and VIA-CL three-dimensional visualization tools. A DCL interpreter, EDT-like editor, a VAX-compatible FORTRAN compiler, and other VAX/VMS features are supported.
Design
Published in Miroslav Popovic, Communication Protocol Engineering, 2018
The specification of the process Game in SDL-PR (SDL program form) is the following: process Game(0,); fpar player Pid; dcl count Integer := 0; /* the counter that contains the result */ start;output Gameid to player; nextstate even; state even; input none; nextstate odd; input Probe; output Lose to player; task count:=count-1; nextstate -; state odd; input Probe; output Win to player; task count:=count+1; nextstate -; input none; nextstate even; state even,odd; input Result; output Score(count) to player; nextstate -; input Endgame; output Gameover(player); stop; endprocess Game;
Application of Artificial Intelligence to Voltage Stability Assessment and Enhancement of Electrical Power Systems
Published in James A. Momoh, Mohamed E. El-Hawary, Electric Systems, Dynamics, and Stability with Artificial Intelligence Applications, 2018
James A. Momoh, Mohamed E. El-Hawary
The KBVCDP developed has been tested on different systems under operational conditions. The program was initially developed under the VAX 11/780 and IBM PC/AT environment using PROLOG, PASCAL, and FORTRAN. Later, the program was modified using OPS83, C, DCL, and FORTRAN languages entirely under the VAX 11/780 environment.
Symmetrical DC-Link Capacitor Voltage for Multi Solar PV Array Fed CHBMLI in Standalone Application
Published in IETE Journal of Research, 2022
Alok Kumar Singh, Rahul Sharma, Rajesh Gupta
Among various multilevel inverters, the CHBMLI converter consists of modules connected in series to obtain desired voltage [16–17]. Each module has a DCL capacitor which can be coupled to the multi-SPV array followed by a boost DDC. The maximum power is collected from each SPV array separately by controlling boost DDC and transfers bulk power to the AC side through the H-bridge modules. If the power generated from the SPV arrays are different due to different temperature and radiation on each SPV array, then the voltages on DCL capacitors are unequal. This will cause unequal switching stress on the switches of the CHBMLI. Therefore, the life span of the H-bridge module is reduced. This problem can be solved by maintaining equal voltage on each DCL capacitor to generate symmetrical inverter output voltage with equal switching stress of the CHB modules. The triangular carrier phase-shifted modulation (TCPSM) is used for obtaining finer harmonic cancellation and more acceptable output voltage waveform [23–24].